mips/math-emu/cp1emu.c

428 	unsigned int fcr31;
734 			        fcr31 = read_32bit_cp1_register(CP1_STATUS);
736 				fcr31 = current->thread.fpu.fcr31;
745 				if (~fcr31 & (1 << bit))
756 				if (fcr31 & (1 << bit))
851 	u32 fcr31 = ctx->fcr31;
856 		value = fcr31;
864 		value = (fcr31 >> (FPU_CSR_FS_S - MIPS_FENR_FS_S)) &
866 		value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM);
874 		value = fcr31 & (FPU_CSR_ALL_X | FPU_CSR_ALL_S);
882 		value = (fcr31 >> (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) &
884 		value |= (fcr31 >> (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) &
908 	u32 fcr31 = ctx->fcr31;
924 		fcr31 = (value & ~mask) | (fcr31 & mask);
932 		fcr31 &= ~(FPU_CSR_FS | FPU_CSR_ALL_E | FPU_CSR_RM);
933 		fcr31 |= (value << (FPU_CSR_FS_S - MIPS_FENR_FS_S)) &
935 		fcr31 |= value & (FPU_CSR_ALL_E | FPU_CSR_RM);
943 		fcr31 &= ~(FPU_CSR_ALL_X | FPU_CSR_ALL_S);
944 		fcr31 |= value & (FPU_CSR_ALL_X | FPU_CSR_ALL_S);
952 		fcr31 &= ~(FPU_CSR_CONDX | FPU_CSR_COND);
953 		fcr31 |= (value << (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) &
955 		fcr31 |= (value << (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) &
963 	ctx->fcr31 = fcr31;
1179 			if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1213 			cond = ctx->fcr31 & cbit;
1375 		if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
1566 			ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
1567 			if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1569 				   ctx->fcr31); */
1761 			if (((ctx->fcr31 & cond) != 0) !=
2134 			if (((ctx->fcr31 & cond) != 0) !=
2764 	ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
2765 	if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
2766 		/*printk ("SIGFPE: FPU csr = %08x\n",ctx->fcr31); */
2781 			ctx->fcr31 |= cbit;
2783 			ctx->fcr31 &= ~cbit;
2919 			 * The 'ieee754_csr' is an alias of ctx->fcr31.
2920 			 * No need to copy ctx->fcr31 to ieee754_csr.