Lines Matching defs:xcp

782 static inline int cop1_64bit(struct pt_regs *xcp)
800 if (cop1_64bit(xcp) && !hybrid_fprs()) \
808 if (cop1_64bit(xcp) && !hybrid_fprs()) { \
829 ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) ^ 1)], 0))
834 fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \
848 static inline void cop1_cfc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
858 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
868 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
876 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
887 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
899 xcp->regs[MIPSInst_RT(ir)] = value;
905 static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
915 value = xcp->regs[MIPSInst_RT(ir)];
920 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
931 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
942 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
951 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
971 static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
974 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc;
993 if (delay_slot(xcp)) {
995 if (!mm_isBranchInstr(xcp, dec_insn, &contpc))
996 clear_delay_slot(xcp);
998 if (!isBranchInstr(xcp, dec_insn, &contpc))
999 clear_delay_slot(xcp);
1003 if (delay_slot(xcp)) {
1046 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0);
1050 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1068 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1085 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1102 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
1126 DIFROMREG(xcp->regs[MIPSInst_RT(ir)],
1136 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1145 SIFROMHREG(xcp->regs[MIPSInst_RT(ir)],
1155 SITOHREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1161 SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
1168 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
1173 cop1_cfc(xcp, ctx, ir);
1178 cop1_ctc(xcp, ctx, ir);
1186 if (!cpu_has_mips_r6 || delay_slot(xcp))
1206 if (delay_slot(xcp))
1233 set_delay_slot(xcp);
1245 bcpc = xcp->cp0_epc;
1246 xcp->cp0_epc += dec_insn.pc_inc;
1251 contpc = (xcp->cp0_epc + (contpc << 1));
1271 sig = mips_dsemul(xcp, ir,
1276 xcp->cp0_epc = bcpc;
1284 contpc = (xcp->cp0_epc + (contpc << 2));
1319 xcp->cp0_epc = bcpc;
1327 sig = mips_dsemul(xcp, ir, bcpc, contpc);
1331 xcp->cp0_epc = bcpc;
1339 xcp->cp0_epc += dec_insn.pc_inc;
1353 sig = fpu_emu(xcp, ctx, ir);
1363 sig = fpux_emu(xcp, ctx, ir, fault_addr);
1376 xcp->regs[MIPSInst_RD(ir)] =
1377 xcp->regs[MIPSInst_RS(ir)];
1384 xcp->cp0_epc = contpc;
1385 clear_delay_slot(xcp);
1463 static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1480 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1481 xcp->regs[MIPSInst_FT(ir)]);
1498 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1499 xcp->regs[MIPSInst_FT(ir)]);
1589 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1590 xcp->regs[MIPSInst_FT(ir)]);
1607 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1608 xcp->regs[MIPSInst_FT(ir)]);
1682 static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1771 if (xcp->regs[MIPSInst_FT(ir)] != 0)
1780 if (xcp->regs[MIPSInst_FT(ir)] == 0)
2143 if (xcp->regs[MIPSInst_FT(ir)] != 0)
2151 if (xcp->regs[MIPSInst_FT(ir)] == 0)
2837 int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
2853 oldepc = xcp->cp0_epc;
2855 prevepc = xcp->cp0_epc;
2862 if ((get_user(instr[0], (u16 __user *)msk_isa16_mode(xcp->cp0_epc))) ||
2863 (get_user(instr[1], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 2))) ||
2864 (get_user(instr[2], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 4))) ||
2865 (get_user(instr[3], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 6)))) {
2902 (mips_instruction __user *) xcp->cp0_epc)) ||
2904 (mips_instruction __user *)(xcp->cp0_epc+4)))) {
2916 xcp->cp0_epc += dec_insn.pc_inc; /* Skip NOPs */
2922 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr);
2936 if ((xcp->cp0_epc ^ prevepc) & 0x1)
2940 } while (xcp->cp0_epc > prevepc);
2943 if (sig == SIGILL && xcp->cp0_epc != oldepc)