Lines Matching defs:insn
84 union mips_instruction insn = *insn_ptr;
85 union mips_instruction mips32_insn = insn;
88 switch (insn.mm_i_format.opcode) {
91 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
92 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
96 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
97 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
101 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
102 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
106 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
107 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
111 if ((insn.mm_i_format.rt == mm_bc1f_op) ||
112 (insn.mm_i_format.rt == mm_bc1t_op)) {
116 (insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0;
121 switch (insn.mm_fp0_format.func) {
130 op = insn.mm_fp0_format.func;
148 mips32_insn.fp6_format.fr = insn.mm_fp6_format.fr;
149 mips32_insn.fp6_format.ft = insn.mm_fp6_format.ft;
150 mips32_insn.fp6_format.fs = insn.mm_fp6_format.fs;
151 mips32_insn.fp6_format.fd = insn.mm_fp6_format.fd;
156 op = insn.mm_fp5_format.op & 0x7;
169 insn.mm_fp5_format.base;
171 insn.mm_fp5_format.index;
173 mips32_insn.r_format.re = insn.mm_fp5_format.fd;
180 if (insn.mm_fp2_format.op == mm_fmovt_op)
182 else if (insn.mm_fp2_format.op == mm_fmovf_op)
187 sdps_format[insn.mm_fp2_format.fmt];
189 (insn.mm_fp2_format.cc<<2) + op;
191 insn.mm_fp2_format.fs;
193 insn.mm_fp2_format.fd;
200 if (insn.mm_fp0_format.op == mm_fadd_op)
202 else if (insn.mm_fp0_format.op == mm_fsub_op)
204 else if (insn.mm_fp0_format.op == mm_fmul_op)
206 else if (insn.mm_fp0_format.op == mm_fdiv_op)
211 sdps_format[insn.mm_fp0_format.fmt];
213 insn.mm_fp0_format.ft;
215 insn.mm_fp0_format.fs;
217 insn.mm_fp0_format.fd;
224 if (insn.mm_fp0_format.op == mm_fmovn_op)
226 else if (insn.mm_fp0_format.op == mm_fmovz_op)
231 sdps_format[insn.mm_fp0_format.fmt];
233 insn.mm_fp0_format.ft;
235 insn.mm_fp0_format.fs;
237 insn.mm_fp0_format.fd;
243 switch (insn.mm_fp1_format.op) {
248 if ((insn.mm_fp1_format.op & 0x7f) ==
254 mips32_insn.r_format.rs = insn.mm_fp4_format.fs;
256 (insn.mm_fp4_format.cc << 2) + op;
257 mips32_insn.r_format.rd = insn.mm_fp4_format.rt;
265 if ((insn.mm_fp1_format.op & 0x7f) ==
268 fmt = swl_format[insn.mm_fp3_format.fmt];
271 fmt = dwl_format[insn.mm_fp3_format.fmt];
277 insn.mm_fp3_format.fs;
279 insn.mm_fp3_format.rt;
288 if ((insn.mm_fp1_format.op & 0x7f) ==
291 else if ((insn.mm_fp1_format.op & 0x7f) ==
298 sdps_format[insn.mm_fp3_format.fmt];
301 insn.mm_fp3_format.fs;
303 insn.mm_fp3_format.rt;
316 if (insn.mm_fp1_format.op == mm_ffloorl_op)
318 else if (insn.mm_fp1_format.op == mm_ffloorw_op)
320 else if (insn.mm_fp1_format.op == mm_fceill_op)
322 else if (insn.mm_fp1_format.op == mm_fceilw_op)
324 else if (insn.mm_fp1_format.op == mm_ftruncl_op)
326 else if (insn.mm_fp1_format.op == mm_ftruncw_op)
328 else if (insn.mm_fp1_format.op == mm_froundl_op)
330 else if (insn.mm_fp1_format.op == mm_froundw_op)
332 else if (insn.mm_fp1_format.op == mm_fcvtl_op)
338 sd_format[insn.mm_fp1_format.fmt];
341 insn.mm_fp1_format.fs;
343 insn.mm_fp1_format.rt;
349 if (insn.mm_fp1_format.op == mm_frsqrt_op)
351 else if (insn.mm_fp1_format.op == mm_fsqrt_op)
357 sdps_format[insn.mm_fp1_format.fmt];
360 insn.mm_fp1_format.fs;
362 insn.mm_fp1_format.rt;
371 if (insn.mm_fp1_format.op == mm_mfc1_op)
373 else if (insn.mm_fp1_format.op == mm_mtc1_op)
375 else if (insn.mm_fp1_format.op == mm_cfc1_op)
377 else if (insn.mm_fp1_format.op == mm_ctc1_op)
379 else if (insn.mm_fp1_format.op == mm_mfhc1_op)
386 insn.mm_fp1_format.rt;
388 insn.mm_fp1_format.fs;
399 sdps_format[insn.mm_fp4_format.fmt];
400 mips32_insn.fp0_format.ft = insn.mm_fp4_format.rt;
401 mips32_insn.fp0_format.fs = insn.mm_fp4_format.fs;
402 mips32_insn.fp0_format.fd = insn.mm_fp4_format.cc << 2;
404 insn.mm_fp4_format.cond | MM_MIPS32_COND_FC;
427 union mips_instruction insn = (union mips_instruction)dec_insn.insn;
433 switch (insn.i_format.opcode) {
435 switch (insn.r_format.func) {
437 if (insn.r_format.rd != 0) {
438 regs->regs[insn.r_format.rd] =
445 if (NO_R6EMU && insn.r_format.func == jr_op)
447 *contpc = regs->regs[insn.r_format.rs];
452 switch (insn.i_format.rt) {
455 if (NO_R6EMU && (insn.i_format.rs ||
456 insn.i_format.rt == bltzall_op))
468 if ((long)regs->regs[insn.i_format.rs] < 0)
471 (insn.i_format.simmediate << 2);
479 if (NO_R6EMU && (insn.i_format.rs ||
480 insn.i_format.rt == bgezall_op))
492 if ((long)regs->regs[insn.i_format.rs] >= 0)
495 (insn.i_format.simmediate << 2);
515 *contpc |= (insn.j_format.target << 2);
524 if (regs->regs[insn.i_format.rs] ==
525 regs->regs[insn.i_format.rt])
528 (insn.i_format.simmediate << 2);
539 if (regs->regs[insn.i_format.rs] !=
540 regs->regs[insn.i_format.rt])
543 (insn.i_format.simmediate << 2);
550 if (!insn.i_format.rt && NO_R6EMU)
567 if (cpu_has_mips_r6 && insn.i_format.rt) {
568 if ((insn.i_format.opcode == blez_op) &&
569 ((!insn.i_format.rs && insn.i_format.rt) ||
570 (insn.i_format.rs == insn.i_format.rt)))
578 if ((long)regs->regs[insn.i_format.rs] <= 0)
581 (insn.i_format.simmediate << 2);
588 if (!insn.i_format.rt && NO_R6EMU)
605 if (cpu_has_mips_r6 && insn.i_format.rt) {
606 if ((insn.i_format.opcode == blez_op) &&
607 ((!insn.i_format.rs && insn.i_format.rt) ||
608 (insn.i_format.rs == insn.i_format.rt)))
617 if ((long)regs->regs[insn.i_format.rs] > 0)
620 (insn.i_format.simmediate << 2);
630 if (insn.i_format.rt && !insn.i_format.rs)
638 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0)
639 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2);
644 if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0)
645 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2);
650 if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt))
651 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2);
656 if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32)))
657 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2);
692 if (!insn.i_format.rs)
703 ((insn.i_format.rs == bc1eqz_op) ||
704 (insn.i_format.rs == bc1nez_op))) {
706 fpr = ¤t->thread.fpu.fpr[insn.i_format.rt];
708 switch (insn.i_format.rs) {
719 (insn.i_format.simmediate << 2);
731 if (insn.i_format.rs == bc_op) {
739 bit = (insn.i_format.rt >> 2);
742 switch (insn.i_format.rt & 3) {
748 (insn.i_format.simmediate << 2);
759 (insn.i_format.simmediate << 2);
1019 ir = dec_insn.insn; /* process current instr */
1343 * dslot as normal insn
2874 dec_insn.insn = (*instr_ptr << 16) |
2880 dec_insn.insn = (*instr_ptr << 16) |
2901 if ((get_user(dec_insn.insn,
2913 if ((dec_insn.insn == 0) ||
2915 ((dec_insn.insn & 0xffff) == MM_NOP16)))