Lines Matching refs:__raw_writel
63 __raw_writel(TCR_BASE, &tmrptr->tcr);
64 __raw_writel(0, &tmrptr->tisr);
65 __raw_writel(TIMER_CCD, &tmrptr->ccdr);
66 __raw_writel(TXx9_TMITMR_TZCE, &tmrptr->itmr);
67 __raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra);
68 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);
83 __raw_writel(TCR_BASE, &tmrptr->tcr);
85 __raw_writel(0, &tmrptr->tisr);
96 __raw_writel(TXx9_TMITMR_TIIE | TXx9_TMITMR_TZCE, &tmrptr->itmr);
98 __raw_writel(((u64)(NSEC_PER_SEC / HZ) * evt->mult) >> evt->shift,
100 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);
111 __raw_writel(TXx9_TMITMR_TIIE, &tmrptr->itmr);
122 __raw_writel(0, &tmrptr->itmr);
133 __raw_writel(TIMER_CCD, &tmrptr->ccdr);
134 __raw_writel(0, &tmrptr->itmr);
147 __raw_writel(delta, &tmrptr->cpra);
148 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);
172 __raw_writel(0, &tmrptr->tisr); /* ack interrupt */
185 __raw_writel(TIMER_CCD, &tmrptr->ccdr);
186 __raw_writel(0, &tmrptr->itmr);
211 __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr);
213 __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr);
214 __raw_writel(0, &tmrptr->tisr);
215 __raw_writel(0xffffffff, &tmrptr->cpra);
216 __raw_writel(0, &tmrptr->itmr);
217 __raw_writel(0, &tmrptr->ccdr);
218 __raw_writel(0, &tmrptr->pgmr);