cavium-octeon/executive/cvmx-helper-sgmii.c

48  * @index:     Index of prot on the interface
52 static int __cvmx_helper_sgmii_hardware_init_one_time(int interface, int index)
60 	gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
62 	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
70 	    cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
72 	    cvmx_read_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface));
82 	cvmx_write_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface),
98 		    cvmx_read_csr(CVMX_PCSX_ANX_ADV_REG(index, interface));
103 		cvmx_write_csr(CVMX_PCSX_ANX_ADV_REG(index, interface),
108 		    cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
114 					  (index, interface));
119 				       (index, interface),
133  * @index:     Index of prot on the interface
137 static int __cvmx_helper_sgmii_hardware_init_link(int interface, int index)
150 	    cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
153 		cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface),
156 		    (CVMX_PCSX_MRX_CONTROL_REG(index, interface),
160 			     interface, index);
172 	cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface),
182 	    CVMX_WAIT_FOR_FIELD64(CVMX_PCSX_MRX_STATUS_REG(index, interface),
185 		/* cvmx_dprintf("SGMII%d: Port %d link timeout\n", interface, index); */
196  * @index:     Index of prot on the interface
202 							int index,
211 	gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
214 	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
218 	    (CVMX_GMXX_PRTX_CFG(index, interface), union cvmx_gmxx_prtx_cfg,
220 	    || CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface),
225 		     interface, index);
230 	gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
237 	    cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
257 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
258 		cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
265 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
266 		cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
273 		cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 512);
274 		cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 8192);
281 	cvmx_write_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface),
285 	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
288 	gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
292 	cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
309 	int index;
313 	for (index = 0; index < num_ports; index++) {
314 		int ipd_port = cvmx_helper_get_ipd_port(interface, index);
315 		__cvmx_helper_sgmii_hardware_init_one_time(interface, index);
369 	int index;
373 	for (index = 0; index < num_ports; index++) {
376 		    cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
378 		cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
380 		__cvmx_interrupt_pcsx_intx_en_reg_enable(index, interface);
402 	int index = cvmx_helper_get_interface_index_num(ipd_port);
416 	    cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
426 	    cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
433 		    cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
445 					  (index, interface));
448 				    (interface, index) != 0)
455 					  (index, interface));
511 	int index = cvmx_helper_get_interface_index_num(ipd_port);
512 	__cvmx_helper_sgmii_hardware_init_link(interface, index);
513 	return __cvmx_helper_sgmii_hardware_init_link_speed(interface, index,