alchemy/common/dbdma.c

213 void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
215 	return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
399 	au1x_ddma_desc_t	*dp;
437 	dp = (au1x_ddma_desc_t *)desc_base;
440 	ctp->chan_desc_base = dp;
565 		dp->dscr_cmd0 = cmd0;
566 		dp->dscr_cmd1 = cmd1;
567 		dp->dscr_source0 = src0;
568 		dp->dscr_source1 = src1;
569 		dp->dscr_dest0 = dest0;
570 		dp->dscr_dest1 = dest1;
571 		dp->dscr_stat = 0;
572 		dp->sw_context = 0;
573 		dp->sw_status = 0;
574 		dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
575 		dp++;
579 	dp--;
580 	dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base));
595 	au1x_ddma_desc_t	*dp;
608 	dp = ctp->put_ptr;
614 	if (dp->dscr_cmd0 & DSCR_CMD0_V)
618 	dp->dscr_source0 = buf & ~0UL;
619 	dp->dscr_cmd1 = nbytes;
622 		dp->dscr_cmd0 |= DSCR_CMD0_IE;
624 		dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
634 	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */
636 	dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
641 	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
655 	au1x_ddma_desc_t	*dp;
666 	dp = ctp->put_ptr;
671 	if (dp->dscr_cmd0 & DSCR_CMD0_V)
678 		dp->dscr_cmd0 |= DSCR_CMD0_IE;
680 		dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
682 	dp->dscr_dest0 = buf & ~0UL;
683 	dp->dscr_cmd1 = nbytes;
686 			  dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
687 			  dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
697 	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */
699 	dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
704 	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
720 	au1x_ddma_desc_t	*dp;
734 	dp = ctp->get_ptr;
740 	if (dp->dscr_cmd0 & DSCR_CMD0_V)
744 	*buf = (void *)(phys_to_virt(dp->dscr_dest0));
745 	*nbytes = dp->dscr_cmd1;
746 	rv = dp->dscr_stat;
749 	ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
804 	au1x_ddma_desc_t	*dp;
812 	dp = ctp->chan_desc_base;
815 		dp->dscr_cmd0 &= ~DSCR_CMD0_V;
821 		dp->sw_status = 0;
822 		dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
823 	} while (dp != ctp->chan_desc_base);
870 	au1x_ddma_desc_t	*dp;
879 	dp = ctp->cur_ptr;
888 	ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
895 	au1x_ddma_desc_t *dp;
920 	dp = ctp->chan_desc_base;
924 				  i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
926 				  dp->dscr_source0, dp->dscr_source1,
927 				  dp->dscr_dest0, dp->dscr_dest1);
929 				  dp->dscr_stat, dp->dscr_nxtptr);
930 		dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
931 	} while (dp != ctp->chan_desc_base);
940 	au1x_ddma_desc_t *dp;
954 	dp = ctp->put_ptr;
960 	if (dp->dscr_cmd0 & DSCR_CMD0_V)
964 	dp->dscr_dest0 = dscr->dscr_dest0;
965 	dp->dscr_source0 = dscr->dscr_source0;
966 	dp->dscr_dest1 = dscr->dscr_dest1;
967 	dp->dscr_source1 = dscr->dscr_source1;
968 	dp->dscr_cmd1 = dscr->dscr_cmd1;
971 	dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
972 	dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
976 	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));