kernel/cpu/cpuinfo-static.c

23 void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
27 	ci->use_instr =
40 	if (ci->use_instr != i)
43 	ci->use_mult = fcpu(cpu, "xlnx,use-hw-mul");
44 	if (ci->use_mult != CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)
46 	ci->use_mult =
47 		(ci->use_mult > 1 ?
49 				(ci->use_mult == 1 ? PVR0_USE_HW_MUL_MASK : 0));
51 	ci->use_fpu = fcpu(cpu, "xlnx,use-fpu");
52 	if (ci->use_fpu != CONFIG_XILINX_MICROBLAZE0_USE_FPU)
54 	ci->use_fpu = (ci->use_fpu > 1 ?
56 				(ci->use_fpu == 1 ? PVR0_USE_FPU_MASK : 0));
58 	ci->use_exc =
72 	ci->use_icache = fcpu(cpu, "xlnx,use-icache");
73 	ci->icache_tagbits = fcpu(cpu, "xlnx,addr-tag-bits");
74 	ci->icache_write = fcpu(cpu, "xlnx,allow-icache-wr");
75 	ci->icache_line_length = fcpu(cpu, "xlnx,icache-line-len") << 2;
76 	if (!ci->icache_line_length) {
78 			ci->icache_line_length = 4 << 2;
80 			ci->icache_line_length = 1 << 2;
82 	ci->icache_size = fcpu(cpu, "i-cache-size");
83 	ci->icache_base = fcpu(cpu, "i-cache-baseaddr");
84 	ci->icache_high = fcpu(cpu, "i-cache-highaddr");
86 	ci->use_dcache = fcpu(cpu, "xlnx,use-dcache");
87 	ci->dcache_tagbits = fcpu(cpu, "xlnx,dcache-addr-tag");
88 	ci->dcache_write = fcpu(cpu, "xlnx,allow-dcache-wr");
89 	ci->dcache_line_length = fcpu(cpu, "xlnx,dcache-line-len") << 2;
90 	if (!ci->dcache_line_length) {
92 			ci->dcache_line_length = 4 << 2;
94 			ci->dcache_line_length = 1 << 2;
96 	ci->dcache_size = fcpu(cpu, "d-cache-size");
97 	ci->dcache_base = fcpu(cpu, "d-cache-baseaddr");
98 	ci->dcache_high = fcpu(cpu, "d-cache-highaddr");
99 	ci->dcache_wb = fcpu(cpu, "xlnx,dcache-use-writeback");
101 	ci->use_dopb = fcpu(cpu, "xlnx,d-opb");
102 	ci->use_iopb = fcpu(cpu, "xlnx,i-opb");
103 	ci->use_dlmb = fcpu(cpu, "xlnx,d-lmb");
104 	ci->use_ilmb = fcpu(cpu, "xlnx,i-lmb");
106 	ci->num_fsl = fcpu(cpu, "xlnx,fsl-links");
107 	ci->irq_edge = fcpu(cpu, "xlnx,interrupt-is-edge");
108 	ci->irq_positive = fcpu(cpu, "xlnx,edge-is-positive");
109 	ci->area_optimised = 0;
111 	ci->hw_debug = fcpu(cpu, "xlnx,debug-enabled");
112 	ci->num_pc_brk = fcpu(cpu, "xlnx,number-of-pc-brk");
113 	ci->num_rd_brk = fcpu(cpu, "xlnx,number-of-rd-addr-brk");
114 	ci->num_wr_brk = fcpu(cpu, "xlnx,number-of-wr-addr-brk");
116 	ci->pvr_user1 = fcpu(cpu, "xlnx,pvr-user1");
117 	ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
119 	ci->mmu = fcpu(cpu, "xlnx,use-mmu");
120 	ci->mmu_privins = fcpu(cpu, "xlnx,mmu-privileged-instr");
121 	ci->endian = fcpu(cpu, "xlnx,endianness");
123 	ci->ver_code = 0;
124 	ci->fpga_family_code = 0;
131 			ci->ver_code = cpu_ver_lookup[i].k;
137 			ci->fpga_family_code = family_string_lookup[i].k;
142 	if (ci->ver_code == 0x20 && ci->fpga_family_code != 0xf0)
144 		ci->use_mult = 1;