Lines Matching defs:CI
23 #define CI(c, p) { ci->c = PVR_##p(pvr); }
34 CI(ver_code, VERSION);
65 CI(pvr_user1, USER1);
66 CI(pvr_user2, USER2);
68 CI(mmu, USE_MMU);
69 CI(mmu_privins, MMU_PRIVINS);
70 CI(endian, ENDIAN);
72 CI(use_icache, USE_ICACHE);
73 CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
74 CI(icache_write, ICACHE_ALLOW_WR);
76 CI(icache_size, ICACHE_BYTE_SIZE);
77 CI(icache_base, ICACHE_BASEADDR);
78 CI(icache_high, ICACHE_HIGHADDR);
80 CI(use_dcache, USE_DCACHE);
81 CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS);
82 CI(dcache_write, DCACHE_ALLOW_WR);
84 CI(dcache_size, DCACHE_BYTE_SIZE);
85 CI(dcache_base, DCACHE_BASEADDR);
86 CI(dcache_high, DCACHE_HIGHADDR);
93 CI(use_dopb, D_OPB);
94 CI(use_iopb, I_OPB);
95 CI(use_dlmb, D_LMB);
96 CI(use_ilmb, I_LMB);
97 CI(num_fsl, FSL_LINKS);
99 CI(irq_edge, INTERRUPT_IS_EDGE);
100 CI(irq_positive, EDGE_IS_POSITIVE);
102 CI(area_optimised, AREA_OPTIMISED);
104 CI(hw_debug, DEBUG_ENABLED);
105 CI(num_pc_brk, NUMBER_OF_PC_BRK);
106 CI(num_rd_brk, NUMBER_OF_RD_ADDR_BRK);
107 CI(num_wr_brk, NUMBER_OF_WR_ADDR_BRK);
109 CI(fpga_family_code, TARGET_FAMILY);