kernel/cpu/cache.c

92 #define CACHE_LOOP_LIMITS(start, end, cache_line_length, cache_size)	\
95 	if (start <  UINT_MAX - cache_size)				\
96 		end = min(start + cache_size, end);			\
97 	start &= align;							\
120  * start address is cache aligned
125 #define CACHE_RANGE_LOOP_2(start, end, line_length, op)			\
131 	count = end - start;						\
137 					: : "r" (start), "r" (count),	\
142 #define CACHE_RANGE_LOOP_1(start, end, line_length, op)			\
147 	WARN_ON(end < start);					\
153 				: : "r" (temp), "r" (start), "r" (end),	\
159 static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
165 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
166 				(unsigned int)start, (unsigned int) end);
168 	CACHE_LOOP_LIMITS(start, end,
175 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
177 	for (i = start; i < end; i += cpuinfo.icache_line_length)
185 static void __flush_icache_range_nomsr_irq(unsigned long start,
192 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
193 				(unsigned int)start, (unsigned int) end);
195 	CACHE_LOOP_LIMITS(start, end,
202 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
204 	for (i = start; i < end; i += cpuinfo.icache_line_length)
213 static void __flush_icache_range_noirq(unsigned long start,
219 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
220 				(unsigned int)start, (unsigned int) end);
222 	CACHE_LOOP_LIMITS(start, end,
225 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
227 	for (i = start; i < end; i += cpuinfo.icache_line_length)
377 static void __invalidate_dcache_range_wb(unsigned long start,
383 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
384 				(unsigned int)start, (unsigned int) end);
386 	CACHE_LOOP_LIMITS(start, end,
389 	CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.clear);
391 	for (i = start; i < end; i += cpuinfo.dcache_line_length)
397 static void __invalidate_dcache_range_nomsr_wt(unsigned long start,
403 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
404 				(unsigned int)start, (unsigned int) end);
405 	CACHE_LOOP_LIMITS(start, end,
409 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
411 	for (i = start; i < end; i += cpuinfo.dcache_line_length)
417 static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
424 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
425 				(unsigned int)start, (unsigned int) end);
426 	CACHE_LOOP_LIMITS(start, end,
433 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
435 	for (i = start; i < end; i += cpuinfo.dcache_line_length)
444 static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
451 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
452 				(unsigned int)start, (unsigned int) end);
454 	CACHE_LOOP_LIMITS(start, end,
461 	CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
463 	for (i = start; i < end; i += cpuinfo.dcache_line_length)
489 static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
494 	pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
495 				(unsigned int)start, (unsigned int) end);
497 	CACHE_LOOP_LIMITS(start, end,
500 	CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.flush);
502 	for (i = start; i < end; i += cpuinfo.dcache_line_length)