310 set EXC_A6,		EXC_AREGS+(6*4)		# offset of saved a6
640 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
642 	fsave		FP_SRC(%a6)		# grab the "busy" frame
644 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
645 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
646 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
649 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
650 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
651 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
653 	mov.l		%d0,EXC_OPWORD(%a6)
657 	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
661 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
666 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
668 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
673 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
676 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
679 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
685 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
689 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
690 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
691 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
692 #$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
693 #$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
694 #$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
697 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
699 	mov.b		1+EXC_CMDREG(%a6),%d1
702 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
707 	lea		FP_SRC(%a6),%a0
708 	lea		FP_DST(%a6),%a1
718 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
724 	btst		&ovfl_bit,FPCR_ENABLE(%a6)
727 	btst		&inex2_bit,FPCR_ENABLE(%a6)
730 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
731 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
732 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
734 	unlk		%a6
741 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack
743 	mov.w		&0xe005,2+FP_SRC(%a6)	# save exc status
745 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
746 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
747 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
749 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
751 	unlk		%a6
759 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack
761 	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
762 	mov.w		&0xe001,2+FP_SRC(%a6)	# save exc status
764 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
765 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
766 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
768 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
770 	unlk		%a6
778 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
779 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
780 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
783 	mov.b		&NORM,STAG(%a6)		# set src optype tag
786 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
788 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
793 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
797 	btst		&ovfl_bit,FPCR_ENABLE(%a6)
800 	btst		&inex2_bit,FPCR_ENABLE(%a6)
803 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
804 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
805 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
807 	unlk		%a6
880 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
882 	fsave		FP_SRC(%a6)		# grab the "busy" frame
884 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
885 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
886 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
889 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
890 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
891 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
893 	mov.l		%d0,EXC_OPWORD(%a6)
897 	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
901 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
904 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
906 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
911 	btst		&0x5,1+EXC_CMDREG(%a6)	# is op monadic or dyadic?
916 	btst		&0x4,1+EXC_CMDREG(%a6)	# is op an fsincos?
919 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
922 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
928 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
932 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
933 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
934 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
935 #$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
936 #$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
937 #$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
940 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
942 	mov.b		1+EXC_CMDREG(%a6),%d1
945 	andi.l		&0x00ff01ff,USER_FPSR(%a6)
950 	lea		FP_SRC(%a6),%a0
951 	lea		FP_DST(%a6),%a1
957 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
972 	btst		&unfl_bit,FPCR_ENABLE(%a6)
976 	btst		&inex2_bit,FPCR_ENABLE(%a6)
980 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
981 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
982 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
984 	unlk		%a6
999 	btst		&unfl_bit,FPSR_EXCEPT(%a6)
1003 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack
1005 	mov.w		&0xe003,2+FP_SRC(%a6)	# save exc status
1007 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1008 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1009 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1011 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
1013 	unlk		%a6
1028 	btst		&inex2_bit,FPSR_EXCEPT(%a6)
1033 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to stack
1035 	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
1036 	mov.w		&0xe001,2+FP_SRC(%a6)	# save exc status
1038 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1039 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1040 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1042 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
1044 	unlk		%a6
1052 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
1053 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
1054 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
1057 	mov.b		&NORM,STAG(%a6)		# set src optype tag
1060 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
1062 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
1067 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
1071 	btst		&unfl_bit,FPCR_ENABLE(%a6)
1074 	btst		&inex2_bit,FPCR_ENABLE(%a6)
1077 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1078 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1079 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1081 	unlk		%a6
1205 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
1207 	fsave		FP_SRC(%a6)		# save fp state
1209 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
1210 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
1211 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
1213 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
1217 	mov.l		%a0,EXC_A7(%a6)		# save on stack
1223 	lea		0x4+EXC_EA(%a6),%a0	# load old a7'
1224 	mov.l		%a0,EXC_A7(%a6)		# save on stack
1231 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
1232 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
1233 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
1235 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
1239 	clr.b		SPCOND_FLG(%a6)		# clear special condition flag
1243 	btst		&0x5,EXC_CMDREG(%a6)	# is it an fmove out?
1247 	bfextu		EXC_CMDREG(%a6){&0:&6},%d0
1254 	andi.l		&0x00ff00ff,USER_FPSR(%a6) # zero exception field
1262 	lea		FP_SRC(%a6),%a0		# pass ptr to input
1268 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
1275 	mov.b		%d0,STAG(%a6)		# save src optype tag
1277 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1281 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
1283 	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
1288 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
1294 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
1298 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1300 	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension
1302 	lea		FP_SRC(%a6),%a0
1303 	lea		FP_DST(%a6),%a1
1322 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions set
1327 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
1332 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1337 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1338 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1339 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1341 	unlk		%a6
1346 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
1360 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1364 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1389 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
1391 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
1402 	mov.w		(tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status
1404 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1405 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1406 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1408 	frestore	FP_SRC(%a6)		# restore src op
1410 	unlk		%a6
1431 	bfextu		EXC_CMDREG(%a6){&0:&6},%d0 # extract opclass,src fmt
1499 	bfextu		EXC_CMDREG(%a6){&3:&3},%d0
1509 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
1516 	mov.w		FP_SRC_EX(%a6),%d0	# get exponent
1520 	lea		FP_SRC(%a6),%a0
1523 	mov.b		%d0,STAG(%a6)
1527 	mov.b		&DENORM,STAG(%a6)
1531 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1533 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
1535 	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
1550 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
1555 	mov.l		EXC_A6(%a6),(%a6)	# in case a6 changed
1562 	btst		&0x5,EXC_SR(%a6)
1565 	mov.l		EXC_A7(%a6),%a0		# restore a7
1569 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1570 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1571 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1573 	unlk		%a6
1583 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
1591 	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
1593 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1594 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1595 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1597 	mov.l		(%a6),%a6		# restore frame pointer
1615 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
1622 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1626 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1676 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1677 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1678 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1680 	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd8
1681 	mov.w		&0xe006,2+FP_SRC(%a6)
1683 	frestore	FP_SRC(%a6)
1685 	unlk		%a6
1691 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1692 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1693 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1695 	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
1696 	mov.w		&0xe004,2+FP_SRC(%a6)
1698 	frestore	FP_SRC(%a6)
1700 	unlk		%a6
1706 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1708 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1709 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1710 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1712 	mov.w		&0x30d4,EXC_VOFF(%a6)	# vector offset = 0xd4
1713 	mov.w		&0xe005,2+FP_SRC(%a6)
1715 	frestore	FP_SRC(%a6)		# restore EXOP
1717 	unlk		%a6
1726 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
1728 	btst		&0x5,EXC_SR(%a6)
1731 	mov.l		EXC_A7(%a6),%a0		# restore a7 whether we need
1735 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1737 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1738 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1739 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1741 	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
1742 	mov.w		&0xe003,2+FP_SRC(%a6)
1744 	frestore	FP_SRC(%a6)		# restore EXOP
1746 	unlk		%a6
1751 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was the <ea> mode -(sp)?
1758 	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
1759 	fmovm.x		&0x40,FP_DST(%a6)	# put EXOP on stack
1761 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1762 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1763 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1765 	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
1766 	mov.w		&0xe003,2+FP_DST(%a6)
1768 	frestore	FP_DST(%a6)		# restore EXOP
1770 	mov.l		(%a6),%a6		# restore frame pointer
1787 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1789 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1790 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1791 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1793 	mov.w		&0x30c4,EXC_VOFF(%a6)	# vector offset = 0xc4
1794 	mov.w		&0xe001,2+FP_SRC(%a6)
1796 	frestore	FP_SRC(%a6)		# restore EXOP
1798 	unlk		%a6
1810 	andi.l		&0x0ff00ff,USER_FPSR(%a6) # zero exception field
1817 	lea		FP_SRC(%a6),%a0		# pass ptr to src
1820 	mov.b		%d0,STAG(%a6)		# save src optype tag
1822 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1826 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
1828 	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
1833 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
1839 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
1843 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1845 	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension
1847 	lea		FP_SRC(%a6),%a0
1848 	lea		FP_DST(%a6),%a1
1867 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
1872 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
1877 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1882 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
1885 	mov.l		EXC_A7(%a6),%a0		# update user a7
1889 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1890 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1891 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1893 	unlk		%a6			# unravel stack frame
1904 	btst		&mia7_bit,SPCOND_FLG(%a6) # was ea mode (a7)+
1907 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1908 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1909 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1911 	unlk		%a6			# unravel stack frame
1924 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled & set
1938 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1942 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1967 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
1969 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
1979 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
1982 	mov.l		EXC_A7(%a6),%a0		# update user a7
1986 	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
1988 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1989 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1990 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1992 	frestore	FP_SRC(%a6)		# restore src op
1994 	unlk		%a6
2014 	btst		&mia7_bit,SPCOND_FLG(%a6)
2017 	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
2019 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2020 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2021 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2023 	frestore	FP_SRC(%a6)		# restore src op
2025 	unlk		%a6			# unravel stack frame
2068 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
2073 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
2078 	lea		FP_SRC(%a6),%a0
2085 	mov.b		%d0,STAG(%a6)		# save src optype tag
2088 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
2090 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
2092 	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
2107 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
2111 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
2113 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
2116 	mov.l		EXC_A7(%a6),%a0		# update user a7
2120 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2121 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2122 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2124 	unlk		%a6			# unravel stack frame
2135 	btst		&mda7_bit,SPCOND_FLG(%a6) # was ea mode -(a7)
2138 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2139 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2140 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2142 	mov.l		(%a6),%a6		# restore frame pointer
2160 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
2164 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
2174 	btst		&0x5,EXC_SR(%a6)
2177 	mov.l		EXC_A7(%a6),%a0
2182 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2188 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2189 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2190 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2192 	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd0
2193 	mov.w		&0xe006,2+FP_SRC(%a6)	# set fsave status
2195 	frestore	FP_SRC(%a6)		# restore src operand
2197 	mov.l		(%a6),%a6		# restore frame pointer
2214 	btst		&0x5,EXC_SR(%a6)
2217 	mov.l		EXC_A7(%a6),%a0
2222 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2228 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2229 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2230 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2232 	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
2233 	mov.w		&0xe004,2+FP_SRC(%a6)	# set fsave status
2235 	frestore	FP_SRC(%a6)		# restore src operand
2237 	mov.l		(%a6),%a6		# restore frame pointer
2254 	btst		&0x5,EXC_SR(%a6)
2257 	mov.l		EXC_A7(%a6),%a0
2262 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2268 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2269 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2270 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2272 	mov.w		&0x30c4,EXC_VOFF(%a6)	# vector offset = 0xc4
2273 	mov.w		&0xe001,2+FP_SRC(%a6)	# set fsave status
2275 	frestore	FP_SRC(%a6)		# restore src operand
2277 	mov.l		(%a6),%a6		# restore frame pointer
2302 	bfextu		EXC_EXTWORD(%a6){&3:&3},%d0 # extract src specifier
2310 	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
2317 	mov.l		FP_SRC_HI(%a6),%d1	# fetch DENORM hi(man)
2320 	mov.l		%d1,FP_SRC_HI(%a6)	# insert new hi(man)
2321 	andi.w		&0x8000,FP_SRC_EX(%a6)	# clear old exponent
2322 	ori.w		&0x3f80,FP_SRC_EX(%a6)	# insert new "skewed" exponent
2327 	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
2333 	tst.b		FP_SRC_EX(%a6)		# make "internal format"
2334 	smi.b		0x2+FP_SRC(%a6)
2335 	mov.w		%d0,FP_SRC_EX(%a6)	# insert exponent with cleared sign
2337 	lea		FP_SRC(%a6),%a0		# pass ptr to src op
2341 	tst.b		0x2+FP_SRC(%a6)		# is sign set?
2345 	bset		&0x7,FP_SRC_HI(%a6)	# set j-bit
2346 	mov.w		%d0,FP_SRC_EX(%a6)	# insert new exponent
2353 	btst		&0x5,EXC_SR(%a6)
2355 	mov.l		0x0(%a0),FP_DST_EX(%a6)
2356 	mov.l		0x4(%a0),FP_DST_HI(%a6)
2357 	mov.l		0x8(%a0),FP_DST_LO(%a6)
2463 	link		%a6,&-LOCAL_SIZE	# init stack frame
2465 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
2466 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
2467 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
2470 	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
2472 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
2473 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
2475 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
2502 	andi.l		&0x00ff00ff,USER_FPSR(%a6)
2508 	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
2509 	lea		FP_SRC(%a6),%a1		# pass: ptr to super addr
2520 	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
2521 	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
2529 	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
2535 	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
2538 	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
2540 	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
2543 	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
2545 	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
2548 	addi.l		&0xc,EXC_EXTWPTR(%a6)	# update extension word pointer
2551 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
2553 	mov.b		%d0,STAG(%a6)		# could be ANYTHING!!!
2557 	mov.b		%d0,STAG(%a6)		# set new optype tag
2559 	clr.b		STORE_FLG(%a6)		# clear "store result" boolean
2561 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
2563 	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation fsincos,ftst,fcmp?
2567 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
2570 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
2572 	mov.b		%d0,DTAG(%a6)		# could be ANYTHING!!!
2576 	mov.b		%d0,DTAG(%a6)		# set new optype tag
2581 	btst		&0x3,1+EXC_CMDREG(%a6)	# is operation fsincos?
2585 	st		STORE_FLG(%a6)		# don't store a final result
2586 	btst		&0x1,1+EXC_CMDREG(%a6)	# is operation fcmp?
2591 	mov.b		FPCR_MODE(%a6),%d0	# pass: rnd mode,prec
2593 	mov.b		1+EXC_CMDREG(%a6),%d1
2599 	lea		FP_SRC(%a6),%a0
2600 	lea		FP_DST(%a6),%a1
2619 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
2625 	tst.b		STORE_FLG(%a6)		# does this op store a result?
2629 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
2633 	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
2634 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame
2636 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2637 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2638 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2640 	unlk		%a6			# unravel the frame
2648 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enable and set
2654 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
2658 	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
2672 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
2674 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did underflow occur?
2678 	mov.w		(tbl_iea_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
2686 	mov.w		&0xe005,2+FP_SRC(%a6)
2690 	mov.w		&0xe003,2+FP_SRC(%a6)
2693 	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
2694 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame
2696 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2697 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2698 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2700 	frestore	FP_SRC(%a6)		# restore exceptional state
2702 	unlk		%a6			# unravel the frame
2741 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode
2746 	mov.l		%a0,EXC_A7(%a6)		# store current a7
2748 	mov.l		EXC_A7(%a6),%a0		# load possibly new a7
2753 	clr.b		SPCOND_FLG(%a6)
2754 	lea		0x2+EXC_VOFF(%a6),%a0
2755 	mov.l		%a0,EXC_A7(%a6)
2758 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2760 	cmpi.b		SPCOND_FLG(%a6),&mia7_flg
2768 	btst		&0x7,EXC_SR(%a6)
2771 	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
2772 	mov.l		EXC_EXTWPTR(%a6),(EXC_PC,%a6,%d0)
2773 	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)
2775 	lea		(EXC_SR,%a6,%d0),%a0
2776 	mov.l		%a0,EXC_SR(%a6)
2778 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2779 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2780 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2782 	unlk		%a6
2787 	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2788 	mov.l		EXC_EXTWPTR(%a6),(EXC_PC-0x4,%a6,%d0)
2789 	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
2790 	mov.l		EXC_PC(%a6),(EXC_VOFF+0x2-0x4,%a6,%d0)
2792 	lea		(EXC_SR-0x4,%a6,%d0),%a0
2793 	mov.l		%a0,EXC_SR(%a6)
2795 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2796 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2797 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2799 	unlk		%a6
2805 	mov.b		%d1,EXC_VOFF(%a6)	# store strg
2806 	mov.b		%d0,0x1+EXC_VOFF(%a6)	# store size
2808 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2809 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2810 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2812 	mov.l		(%a6),-(%sp)		# make a copy of a6
2815 	mov.l		EXC_EXTWPTR(%a6),-(%sp)	# make a copy of Next PC
2818 	mov.b		0x1+EXC_VOFF(%a6),%d0	# fetch size
2821 	btst		&0x7,EXC_SR(%a6)	# is trace enabled?
2824 	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2825 	mov.l		EXC_PC(%a6),(EXC_VOFF-0x2,%a6,%d0)
2826 	mov.l		(%sp)+,(EXC_PC-0x4,%a6,%d0)
2827 	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
2829 	pea		(%a6,%d0)		# create final sp
2833 	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
2834 	mov.l		(%sp)+,(EXC_PC,%a6,%d0)
2835 	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)
2837 	pea		(0x4,%a6,%d0)		# create final sp
2841 	mov.b		EXC_VOFF(%a6),%d1	# fetch strg
2845 	fmovm.x		&0x80,(0x4+0x8,%a6,%d0)
2850 	fmovm.x		&0x40,(0x4+0x8,%a6,%d0)
2855 	fmovm.x		&0x20,(0x4+0x8,%a6,%d0)
2860 	fmovm.x		&0x10,(0x4+0x8,%a6,%d0)
2865 	fmovm.x		&0x08,(0x4+0x8,%a6,%d0)
2870 	fmovm.x		&0x04,(0x4+0x8,%a6,%d0)
2875 	fmovm.x		&0x02,(0x4+0x8,%a6,%d0)
2880 	fmovm.x		&0x01,(0x4+0x8,%a6,%d0)
2884 	mov.l		0xc(%sp),%a6
2897 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2898 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2899 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2901 	btst		&0x7,EXC_SR(%a6)	# is trace on?
2904 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set Next PC
2906 	unlk		%a6			# unravel the frame
2929 # -restore a6 (not with unlk)
2930 # -shift stack frame down over where old a6 used to be
2933 	mov.l		(%a6),%a6		# restore frame pointer
2952 	link		%a6,&-LOCAL_SIZE	# init stack frame
2954 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
2957 	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
2958 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
2959 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
2961 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
2987 	mov.l		EXC_EXTWPTR(%a6),%d0
2988 	sub.l		EXC_PC(%a6),%d0
2990 	mov.w		%d0,EXC_VOFF(%a6)	# store stack shift value
2992 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2994 	unlk		%a6
3018 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3019 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
3021 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3023 	unlk		%a6
3041 	lea		-LOCAL_SIZE(%a6),%sp
3046 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
3049 	mov.l		(%a6),%a6
3108 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3110 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3112 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3113 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3114 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3117 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3119 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3120 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3122 	mov.l		%d0,EXC_OPWORD(%a6)
3134 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3138 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3139 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3140 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3142 	frestore	FP_SRC(%a6)
3144 	unlk		%a6
3166 	mov.w		FP_SRC_EX(%a6),%d1	# fetch exponent
3171 	tst.l		FP_SRC_LO(%a6)
3173 	mov.l		FP_SRC_HI(%a6),%d1
3177 	mov.l		FP_SRC_HI(%a6),L_SCR1(%a6)
3182 	tst.b		FP_SRC_EX(%a6)
3186 	mov.l		%d1,L_SCR1(%a6)
3190 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
3205 	mov.b		L_SCR1(%a6),%d0		# load positive default result
3208 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3221 	mov.w		L_SCR1(%a6),%d0		# load positive default result
3224 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3237 	mov.l		L_SCR1(%a6),%d0		# load positive default result
3240 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3304 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3306 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3308 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3309 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3310 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3313 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3315 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3316 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3318 	mov.l		%d0,EXC_OPWORD(%a6)
3330 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3334 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3335 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3336 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3338 	frestore	FP_SRC(%a6)
3340 	unlk		%a6
3360 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
3375 	mov.b		FP_SRC_HI(%a6),%d0	# load upper byte of SNAN
3379 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3392 	mov.w		FP_SRC_HI(%a6),%d0	# load upper word of SNAN
3396 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3409 	mov.l		FP_SRC_HI(%a6),%d0	# load upper longword of SNAN
3413 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3428 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3431 	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
3434 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3442 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3446 	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
3455 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3458 	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
3459 	mov.l		%d0,FP_SCR0_EX(%a6)	# store to temp space
3462 	or.l		%d1,FP_SCR0_EX(%a6)	# create dbl hi
3463 	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
3466 	mov.l		%d1,FP_SCR0_HI(%a6)	# store to temp space
3467 	mov.l		FP_SRC_LO(%a6),%d1	# load lo mantissa
3469 	or.l		%d1,FP_SCR0_HI(%a6)	# create dbl lo
3470 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
3471 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
3484 	clr.b		SPCOND_FLG(%a6)		# clear special case flag
3486 	mov.w		FP_SRC_EX(%a6),FP_SCR0_EX(%a6)
3487 	clr.w		2+FP_SCR0(%a6)
3488 	mov.l		FP_SRC_HI(%a6),%d0
3490 	mov.l		%d0,FP_SCR0_HI(%a6)
3491 	mov.l		FP_SRC_LO(%a6),FP_SCR0_LO(%a6)
3493 	btst		&0x5,EXC_SR(%a6)	# supervisor mode exception?
3497 	mov.l		%a0,EXC_A7(%a6)		# save on stack for calc_ea()
3498 	mov.l		(%a6),EXC_A6(%a6)
3502 	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>
3504 	mov.l		EXC_A7(%a6),%a0
3506 	mov.l		EXC_A6(%a6),(%a6)
3509 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
3519 	mov.l		(%a6),EXC_A6(%a6)
3523 	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>
3525 	mov.l		EXC_A6(%a6),(%a6)
3527 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
3531 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3532 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3533 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3535 	frestore	FP_SRC(%a6)
3537 	mov.l		EXC_A6(%a6),%a6		# restore frame pointer
3596 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3598 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3600 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3601 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3602 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3605 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3607 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3608 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3610 	mov.l		%d0,EXC_OPWORD(%a6)
3623 	cmpi.w		FP_SRC_EX(%a6),&0x401e	# is exponent 0x401e?
3626 	fmov.l		FP_SRC_HI(%a6),%fp0	# load integer src
3627 	fmov.x		%fp0,FP_SRC(%a6)	# store integer as extended precision
3628 	mov.w		&0xe001,0x2+FP_SRC(%a6)
3631 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3639 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
3644 	bfextu		EXC_EXTWORD(%a6){&0:&6},%d1 # extract upper 6 of cmdreg
3648 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3650 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
3655 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
3658 	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation an fsincos?
3661 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
3664 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
3670 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
3674 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
3676 	mov.b		1+EXC_CMDREG(%a6),%d1
3679 	lea		FP_SRC(%a6),%a0
3680 	lea		FP_DST(%a6),%a1
3687 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
3691 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3692 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3693 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3695 	frestore	FP_SRC(%a6)
3697 	unlk		%a6
3702 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
3703 	mov.b		1+EXC_CMDREG(%a6),%d1
3724 	mov.b		&NORM,STAG(%a6)		# src is a NORM
3727 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
3729 	andi.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
3731 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
3770 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3772 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3774 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3775 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3776 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3779 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3781 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3782 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3784 	mov.l		%d0,EXC_OPWORD(%a6)
3792 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3796 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3797 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3798 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3800 	frestore	FP_SRC(%a6)
3802 	unlk		%a6
3879 	mov.b		1+EXC_OPWORD(%a6), %d0	# fetch opcode word
3896 	mov.l		EXC_EA(%a6),%a0		# return <ea>
3902 	mov.b		&immed_flg,SPCOND_FLG(%a6)
3903 	lea		([USER_FPIAR,%a6],0x4),%a0 # no; return <ea>
3912 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3923 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3930 	mov.l		%a0,EXC_EA(%a6)		# put correct <ea> on stack
3962 	mov.b		1+EXC_OPWORD(%a6),%d0	# fetch opcode word
3974 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3982 	mov.l		EXC_EA(%a6),%a0
3997 	addi.l		&0xc,EXC_DREGS+0x8(%a6)
4000 	addi.l		&0xc,EXC_DREGS+0xc(%a6)
4015 	addi.l		&0xc,EXC_A6(%a6)
4018 	mov.b		&mia7_flg,SPCOND_FLG(%a6)
4019 	addi.l		&0xc,EXC_A7(%a6)
4027 	mov.l		EXC_EA(%a6),%a0
4029 	sub.l		&0x8,EXC_EA(%a6)
4044 	mov.l		%a0,EXC_DREGS+0x8(%a6)
4047 	mov.l		%a0,EXC_DREGS+0xc(%a6)
4062 	mov.l		%a0,EXC_A6(%a6)
4065 	mov.l		%a0,EXC_A7(%a6)
4066 	mov.b		&mda7_flg,SPCOND_FLG(%a6)
4268 	mov.b		1+EXC_EXTWORD(%a6),%d1	# fetch extword
4289 	btst		&0x5,EXC_EXTWORD(%a6)	# is it a move in or out?
4296 	btst		&0x4,EXC_EXTWORD(%a6)	# control or predecrement?
4306 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
4310 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
4328 	mov.l		0x0+EXC_FP0(%a6),(%a0)+	# yes
4329 	mov.l		0x4+EXC_FP0(%a6),(%a0)+
4330 	mov.l		0x8+EXC_FP0(%a6),(%a0)+
4336 	mov.l		0x0+EXC_FP1(%a6),(%a0)+	# yes
4337 	mov.l		0x4+EXC_FP1(%a6),(%a0)+
4338 	mov.l		0x8+EXC_FP1(%a6),(%a0)+
4383 	mov.l		%a1,L_SCR1(%a6)
4401 	mov.l		%a0,L_SCR1(%a6)
4423 	mov.l		(%a0)+,0x0+EXC_FP0(%a6)	# yes
4424 	mov.l		(%a0)+,0x4+EXC_FP0(%a6)
4425 	mov.l		(%a0)+,0x8+EXC_FP0(%a6)
4431 	mov.l		(%a0)+,0x0+EXC_FP1(%a6)	# yes
4432 	mov.l		(%a0)+,0x4+EXC_FP1(%a6)
4433 	mov.l		(%a0)+,0x8+EXC_FP1(%a6)
4577 	mov.w		EXC_OPWORD(%a6),%d0	# fetch opcode word
4665 	mov.l		EXC_DREGS+0x8(%a6),%a0	# Get current a0
4669 	mov.l		EXC_DREGS+0xc(%a6),%a0	# Get current a1
4689 	mov.l		(%a6),%a0		# Get current a6
4693 	mov.l		EXC_A7(%a6),%a0		# Get current a7
4700 	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
4703 	mov.l		%d1,EXC_DREGS+0x8(%a6)	# Save incr value
4708 	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
4711 	mov.l		%d1,EXC_DREGS+0xc(%a6)	# Save incr value
4748 	mov.l		(%a6),%d0		# Get current a6
4751 	mov.l		%d1,(%a6)		# Save incr value
4756 	mov.b		&mia7_flg,SPCOND_FLG(%a6) # set "special case" flag
4758 	mov.l		EXC_A7(%a6),%d0		# Get current a7
4761 	mov.l		%d1,EXC_A7(%a6)		# Save incr value
4769 	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
4771 	mov.l		%d0,EXC_DREGS+0x8(%a6)	# Save decr value
4776 	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
4778 	mov.l		%d0,EXC_DREGS+0xc(%a6)	# Save decr value
4811 	mov.l		(%a6),%d0		# Get current a6
4813 	mov.l		%d0,(%a6)		# Save decr value
4818 	mov.b		&mda7_flg,SPCOND_FLG(%a6) # set "special case" flag
4820 	mov.l		EXC_A7(%a6),%d0		# Get current a7
4822 	mov.l		%d0,EXC_A7(%a6)		# Save decr value
4830 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4831 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4839 	add.l		EXC_DREGS+0x8(%a6),%a0	# a0 + d16
4843 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4844 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4852 	add.l		EXC_DREGS+0xc(%a6),%a0	# a1 + d16
4856 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4857 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4869 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4870 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4882 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4883 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4895 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4896 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4908 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4909 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4917 	add.l		(%a6),%a0		# a6 + d16
4921 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4922 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4930 	add.l		EXC_A7(%a6),%a0		# a7 + d16
4944 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4945 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4956 	mov.l		%d0,L_SCR1(%a6)		# hold opword
4966 	mov.l		L_SCR1(%a6),%d2		# fetch opword
4989 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4990 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5003 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5004 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5017 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5018 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5026 	add.l		EXC_EXTWPTR(%a6),%a0	# pc + d16
5039 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5040 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5046 	mov.l		EXC_EXTWPTR(%a6),%a0	# put base in a0
5052 	mov.l		%d0,L_SCR1(%a6)		# store opword
5062 	mov.l		L_SCR1(%a6),%d2		# fetch opword
5099 	mov.l		%d0,L_SCR1(%a6)		# save d0 (opword)
5105 	mov.l		L_SCR1(%a6),%d5
5132 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5133 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5142 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5143 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5163 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5164 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5173 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5174 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5244 	mov.l		L_SCR1(%a6),%a0
5260 #		USER_FPCR(a6)  = new FPCR value				#
5261 #		USER_FPSR(a6)  = new FPSR value				#
5262 #		USER_FPIAR(a6) = new FPIAR value			#
5286 	mov.b		EXC_EXTWORD(%a6),%d0	# fetch reg select bits
5296 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5297 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5303 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to stack
5304 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5305 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5311 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
5316 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5317 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5323 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to stack
5324 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5325 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5331 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
5336 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5337 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5343 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
5344 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5345 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5351 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
5356 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5357 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5363 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
5364 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5365 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5371 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
5372 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5373 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5379 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to mem
5393 #	FP_SRC(a6) = fp op1(src)					#
5394 #	FP_DST(a6) = fp op2(dst)					#
5397 #	FP_SRC(a6) = fp op1 scaled(src)					#
5398 #	FP_DST(a6) = fp op2 scaled(dst)					#
5414 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
5415 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
5416 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
5417 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
5420 	mov.w		%d0,FP_SCR0_EX(%a6)
5421 	mov.w		%d1,FP_SCR1_EX(%a6)
5425 	mov.w		%d0,L_SCR1(%a6)		# store src exponent
5426 	mov.w		%d1,2+L_SCR1(%a6)	# store dst exponent
5436 	cmpi.b		STAG(%a6),&DENORM	# is dst denormalized?
5439 	lea		FP_SCR0(%a6),%a0
5442 	mov.w		%d0,L_SCR1(%a6)		# inset new exp
5445 	mov.w		2+L_SCR1(%a6),%d0
5448 	cmp.w		%d0,L_SCR1(%a6)		# is difference >= len(mantissa)+2?
5451 	mov.w		L_SCR1(%a6),%d0
5453 	mov.w		FP_SCR0_EX(%a6),%d1
5456 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new dst exponent
5462 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# zero src exponent
5463 	bset		&0x0,1+FP_SCR0_EX(%a6)	# set exp = 1
5473 	cmpi.b		DTAG(%a6),&DENORM	# is dst denormalized?
5475 	lea		FP_SCR1(%a6),%a0
5478 	mov.w		%d0,2+L_SCR1(%a6)	# inset new exp
5481 	mov.w		L_SCR1(%a6),%d0
5484 	cmp.w		%d0,2+L_SCR1(%a6)	# is difference >= len(mantissa)+2?
5487 	mov.w		2+L_SCR1(%a6),%d0
5489 	mov.w		FP_SCR1_EX(%a6),%d1
5492 	mov.w		%d0,FP_SCR1_EX(%a6)	# insert new dst exponent
5498 	andi.w		&0x8000,FP_SCR1_EX(%a6)	# zero dst exponent
5499 	bset		&0x0,1+FP_SCR1_EX(%a6)	# set exp = 1
5509 #			     value at FP_SCR0(a6).			#
5515 #	FP_SCR0(a6) = extended precision operand to be scaled		#
5518 #	FP_SCR0(a6) = scaled extended precision operand			#
5531 	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
5539 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert biased exponent
5541 	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
5551 	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
5568 #	FP_SCR0(a6) = extended precision operand to be scaled		#
5571 #	FP_SCR0(a6) = scaled extended precision operand			#
5585 	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
5588 	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
5591 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# extract operand's sgn
5596 	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5604 	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5612 	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
5618 	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5625 	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5636 #			     value at FP_SCR1(a6).			#
5642 #	FP_SCR1(a6) = extended precision operand to be scaled		#
5645 #	FP_SCR1(a6) = scaled extended precision operand			#
5658 	mov.w		FP_SCR1_EX(%a6),%d1	# extract operand's {sgn,exp}
5666 	mov.w		%d0,FP_SCR1_EX(%a6)	# insert biased exponent
5668 	cmpi.b		DTAG(%a6),&DENORM	# is operand normalized?
5677 	lea		FP_SCR1(%a6),%a0	# pass ptr to dst op
5696 #	FP_SRC(a6) = pointer to extended precision src operand		#
5697 #	FP_DST(a6) = pointer to extended precision dst operand		#
5722 	cmp.b		DTAG(%a6), &SNAN	# is the dst an SNAN?
5724 	cmp.b		DTAG(%a6), &QNAN	# is the dst a  QNAN?
5727 	cmp.b		STAG(%a6), &QNAN
5732 	bset		&0x6, FP_SRC_HI(%a6)	# set SNAN bit
5733 	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5734 	lea		FP_SRC(%a6), %a0
5739 	or.l		&nan_mask, USER_FPSR(%a6)
5740 	lea		FP_SRC(%a6), %a0
5743 	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5744 	bset		&0x6, FP_DST_HI(%a6)	# set SNAN bit
5745 	lea		FP_DST(%a6), %a0
5748 	lea		FP_DST(%a6), %a0
5749 	cmp.b		STAG(%a6), &SNAN
5751 	or.l		&aiop_mask+snan_mask, USER_FPSR(%a6)
5753 	or.l		&nan_mask, USER_FPSR(%a6)
5757 	or.l		&neg_mask, USER_FPSR(%a6)
5786 	or.l		&nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
5848 	btst		&inex2_bit, FPSR_EXCEPT(%a6) # yes; was INEX2 set?
5890 	mov.l		FTEMP_LO(%a0), FTEMP_LO2(%a6) # make FTEMP_LO copy
5891 	mov.l		%d0, GRS(%a6)		# place g,r,s after it
5910 	mov.l		GRS(%a6), %d0		# restore original g,r,s
5945 	mov.b		GRS(%a6), %d2
5946 	or.b		%d2, 3+FTEMP_LO2(%a6)
5951 	bfextu		FTEMP_LO2(%a6){%d0:&32}, %d0 # %d0 = new G,R,S
5999 	mov.b		GRS(%a6), %d2
6000 	or.b		%d2, 3+FTEMP_LO2(%a6)
6007 	bftst		FTEMP_LO2(%a6){%d0:&31}	# were any bits shifted off?
6109 	tst.b		GRS(%a6)		# were any bits shifted off?
6178 	or.w		&inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex
6866 #	bset		&z_bit, FPSR_CC(%a6)	# yes; set zero ccode bit
6876 	btst		&inex2_bit, FPSR_EXCEPT(%a6) # is INEX2 set?
6878 	bset		&aunfl_bit, FPSR_AEXCEPT(%a6) # yes; set aunfl
6926 #	bset		&z_bit,FPSR_CC(%a6)	# yes; set zero ccode bit
6936 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
6938 	bset		&aunfl_bit,FPSR_AEXCEPT(%a6) # yes; set aunfl
7102 	bfextu		EXC_CMDREG(%a6){&3:&3},%d1 # extract dst fmt
7124 	tst.b		STAG(%a6)		# is operand normalized?
7136 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7138 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7142 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7151 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7170 	tst.b		STAG(%a6)		# is operand normalized?
7182 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7184 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7188 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7197 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7216 	tst.b		STAG(%a6)		# is operand normalized?
7228 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7231 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7235 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7244 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7268 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7269 	clr.w		2+FP_SCR0_EX(%a6)	# clear reserved field
7270 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7271 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7278 	lea		FP_SCR0(%a6),%a0	# pass: src addr
7284 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
7292 	tst.b		STAG(%a6)		# is operand normalized?
7298 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set underflow exc bit
7300 	mov.b		FPCR_ENABLE(%a6),%d0
7313 	tst.b		STAG(%a6)		# is operand normalized?
7318 	lea		FP_SCR0(%a6),%a0
7322 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# keep only old sign
7323 	or.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
7324 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
7328 	mov.l		EXC_A6(%a6),(%a6)	# fix stacked a6
7337 	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack
7361 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7369 	or.w		%d1,2+USER_FPSR(%a6)	# set possible inex2/ainex
7372 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7376 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7385 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7396 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL
7398 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7399 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7400 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7405 	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
7408 	lea		FP_SCR0(%a6),%a0
7412 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
7413 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
7416 	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
7419 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7423 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7432 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7437 	mov.b		FPCR_ENABLE(%a6),%d1
7451 	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
7454 	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2
7464 	mov.l		L_SCR3(%a6),%d0		# pass: sgl prec,rnd mode
7469 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7473 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7482 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7487 	mov.b		FPCR_ENABLE(%a6),%d1
7505 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
7506 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
7507 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)
7509 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7511 	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
7524 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7525 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7526 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7528 	cmpi.b		STAG(%a6),&DENORM	# was src a DENORM?
7531 	lea		FP_SCR0(%a6),%a0
7535 	bfins		%d0,FP_SCR0_EX(%a6){&1:&15}
7542 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7543 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7544 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7547 	bclr		&0x7,FP_SCR0_EX(%a6)	# clear sign bit
7548 	sne.b		2+FP_SCR0_EX(%a6)	# set internal sign bit
7549 	lea		FP_SCR0(%a6),%a0	# pass: ptr to DENORM
7551 	mov.b		3+L_SCR3(%a6),%d1
7555 	mov.b		3+L_SCR3(%a6),%d1
7561 	tst.b		2+FP_SCR0_EX(%a6)	# is EXOP negative?
7563 	bset		&0x7,FP_SCR0_EX(%a6)	# yes
7566 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
7575 	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack
7599 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7602 	fmov.d		%fp0,L_SCR1(%a6)	# store does convert and round
7607 	or.w		%d0,2+USER_FPSR(%a6)	# set possible inex2/ainex
7609 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7610 	lea		L_SCR1(%a6),%a0		# pass: src addr
7625 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL
7627 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7628 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7629 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7634 	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
7637 	lea		FP_SCR0(%a6),%a0
7641 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
7642 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
7645 	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
7647 	mov.l		%d0,L_SCR1(%a6)
7648 	mov.l		%d1,L_SCR2(%a6)
7650 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7651 	lea		L_SCR1(%a6),%a0		# pass: src addr
7658 	mov.b		FPCR_ENABLE(%a6),%d1
7672 	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
7675 	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2
7685 	mov.l		L_SCR3(%a6),%d0		# pass: dbl prec,rnd mode
7688 	fmov.d		%fp0,L_SCR1(%a6)	# store to double
7690 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7691 	lea		L_SCR1(%a6),%a0		# pass: src addr
7698 	mov.b		FPCR_ENABLE(%a6),%d1
7716 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
7717 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
7718 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)
7720 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7722 	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
7786 	mov.l		%d0,L_SCR1(%a6)		# put the new exp back on the stack
7790 	mov.l		%d1,L_SCR2(%a6)		# build lower lword in memory
7793 	mov.l		L_SCR2(%a6),%d1
7795 	mov.l		L_SCR1(%a6),%d0
7859 	mov.b		STAG(%a6),%d0		# fetch input type
7863 	btst		&0x4,EXC_CMDREG(%a6)	# static or dynamic?
7867 	mov.b		1+EXC_CMDREG(%a6),%d1	# fetch dynamic reg
7875 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch static field
7881 	lea		FP_SRC(%a6),%a0		# pass: ptr to input
7887 #	andi.l		&0xcfff000f,FP_SCR0(%a6) # clear unused fields
7888 	andi.l		&0xcffff00f,FP_SCR0(%a6) # clear unused fields
7892 	tst.b		3+FP_SCR0_EX(%a6)
7894 	tst.l		FP_SCR0_HI(%a6)
7896 	tst.l		FP_SCR0_LO(%a6)
7908 	andi.w		&0xf000,FP_SCR0(%a6)
7912 	lea		FP_SCR0(%a6),%a0	# pass: src addr
7918 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
7941 	lea		FP_SRC(%a6),%a0
7942 	clr.w		2+FP_SRC_EX(%a6)
7948 	ori.w		&snaniop2_mask,FPSR_EXCEPT(%a6) # set SNAN/AIOP
7949 	bset		&0x6,FP_SRC_HI(%a6)	# set snan bit
8010 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8013 	mov.b		DTAG(%a6),%d1
8015 	or.b		STAG(%a6),%d1		# combine src tags
8019 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
8020 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
8021 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
8023 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8024 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8025 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8034 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
8054 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8056 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8059 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8064 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8067 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8069 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8075 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8077 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8094 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8096 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8099 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8104 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8108 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8110 	mov.b		FPCR_ENABLE(%a6),%d1
8116 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
8118 	mov.l		L_SCR3(%a6),%d0		# pass rnd prec,mode
8120 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
8131 	mov.l		L_SCR3(%a6),%d1
8136 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
8139 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8147 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8149 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8153 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8155 	mov.l		L_SCR3(%a6),%d1
8159 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8172 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8174 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8177 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8182 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8205 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8210 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8215 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8220 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8222 	mov.b		FPCR_ENABLE(%a6),%d1
8227 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8229 	lea		FP_SCR0(%a6),%a0	# pass: result addr
8230 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
8232 	or.b		%d0,FPSR_CC(%a6)	# unf_res2 may have set 'Z'
8233 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8240 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
8242 	mov.l		L_SCR3(%a6),%d1
8248 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8253 	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply
8257 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
8259 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8267 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8269 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8273 	mov.l		L_SCR3(%a6),%d1
8283 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8285 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8288 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8293 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8307 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst operand
8309 	mov.l		L_SCR3(%a6),%d1
8316 	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply
8407 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
8411 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
8432 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
8436 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
8495 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8497 	mov.b		STAG(%a6),%d1		# fetch src optype tag
8514 	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
8527 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8530 	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
8533 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
8543 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8544 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8545 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8546 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
8550 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
8554 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
8555 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8569 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8570 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8571 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8585 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8587 	fmov.x		FP_SCR0(%a6),%fp0	# perform move
8592 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8596 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8597 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8603 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
8605 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
8612 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8613 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8614 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8628 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8630 	tst.b		FP_SCR0_EX(%a6)		# is operand negative?
8632 	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit
8636 	mov.b		FPCR_ENABLE(%a6),%d1
8641 	lea		FP_SCR0(%a6),%a0	# pass: result addr
8642 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
8644 	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
8645 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8653 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
8654 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
8655 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
8665 	mov.w		%d2,FP_SCR1_EX(%a6)	# insert new exponent
8666 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
8675 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8677 	fmov.x		FP_SCR0(%a6),%fp0	# perform move
8682 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8685 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8687 	mov.b		FPCR_ENABLE(%a6),%d1
8696 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
8698 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
8700 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
8711 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8719 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8721 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8729 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8731 	fmov.x		FP_SCR0(%a6),%fp0	# perform the move
8736 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8766 	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
8828 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8831 	mov.b		DTAG(%a6),%d1
8833 	or.b		STAG(%a6),%d1		# combine src tags
8841 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
8842 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
8843 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
8845 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8846 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8847 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8857 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
8868 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8870 	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
8873 	fdiv.x		FP_SCR0(%a6),%fp0	# perform divide
8878 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8881 	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
8883 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8889 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8891 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
8906 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8908 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8911 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
8916 	or.l		%d0,USER_FPSR(%a6)	# save INEX,N
8928 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8930 	mov.b		FPCR_ENABLE(%a6),%d1
8935 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
8937 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
8939 	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
8944 	mov.l		L_SCR3(%a6),%d1
8949 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
8952 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8960 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8962 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8966 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8968 	mov.l		L_SCR3(%a6),%d1
8972 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
8978 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8980 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8985 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
8990 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8992 	mov.b		FPCR_ENABLE(%a6),%d1
8997 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8999 	lea		FP_SCR0(%a6),%a0	# pass: result addr
9000 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
9002 	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
9003 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9010 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
9012 	mov.l		L_SCR3(%a6),%d1
9016 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9021 	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide
9025 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
9027 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
9035 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exp
9037 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9041 	mov.l		L_SCR3(%a6),%d1
9051 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
9053 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9056 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
9061 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9075 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
9077 	mov.l		L_SCR3(%a6),%d1
9084 	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide
9171 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/N
9175 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
9185 	ori.w		&dz_mask+adz_mask,2+USER_FPSR(%a6) # no; set DZ/ADZ
9191 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
9195 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
9214 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/NEG
9220 	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
9269 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
9270 	mov.b		STAG(%a6),%d1
9285 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9286 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9290 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9292 	mov.w		%d0,FP_SCR0_EX(%a6)
9293 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9304 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9306 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9307 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9311 	mov.b		&neg_bmask,FPSR_CC(%a6)	# yes, set 'N' ccode bit
9313 	mov.w		%d0,FP_SCR0_EX(%a6)
9314 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9316 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
9326 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
9330 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
9334 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
9335 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9349 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9350 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9351 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9365 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9367 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9372 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9376 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
9377 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
9383 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
9385 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9392 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9393 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9394 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9408 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9410 	eori.b		&0x80,FP_SCR0_EX(%a6)	# negate sign
9412 	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit
9416 	mov.b		FPCR_ENABLE(%a6),%d1
9421 	lea		FP_SCR0(%a6),%a0	# pass: result addr
9422 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
9424 	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
9425 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9433 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
9434 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
9435 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
9445 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
9446 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
9455 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9457 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9462 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9465 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
9467 	mov.b		FPCR_ENABLE(%a6),%d1
9476 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
9478 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
9480 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
9491 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
9499 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
9500 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9509 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9511 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9516 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9546 	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
9570 	mov.b		STAG(%a6),%d1
9581 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9605 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9615 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9618 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'I','N' ccode bits
9628 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9631 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
9662 	mov.b		STAG(%a6),%d1
9678 	or.l		%d0,USER_FPSR(%a6)	# set exception bits
9706 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
9707 	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
9708 	lea		FP_SCR0(%a6),%a0
9719 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
9723 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
9734 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9737 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
9768 	mov.b		STAG(%a6),%d1
9780 	or.l		%d0,USER_FPSR(%a6)	# set exception bits
9808 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
9809 	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
9810 	lea		FP_SCR0(%a6),%a0
9821 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
9825 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
9836 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9839 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
9892 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
9893 	mov.b		STAG(%a6),%d1
9908 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9909 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9912 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert exponent
9913 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9924 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9926 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9927 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9930 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert exponent
9932 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9934 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
9944 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
9948 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
9952 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
9953 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9967 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9968 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9969 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9983 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9985 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
9990 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9994 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
9995 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
10001 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
10003 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10010 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10011 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10012 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10026 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10028 	bclr		&0x7,FP_SCR0_EX(%a6)	# force absolute value
10031 	mov.b		FPCR_ENABLE(%a6),%d1
10036 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10037 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10039 	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
10040 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10048 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
10049 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
10050 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
10060 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
10061 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
10070 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10072 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
10077 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10080 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
10082 	mov.b		FPCR_ENABLE(%a6),%d1
10091 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
10093 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
10095 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
10106 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10114 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10115 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10124 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10126 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
10131 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10158 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10161 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
10190 	mov.b		DTAG(%a6),%d1
10192 	or.b		STAG(%a6),%d1
10205 	mov.b		%d0,FPSR_CC(%a6)	# set ccode bits(no exc bits are set)
10276 	andi.b		&0xf7,FPSR_CC(%a6)
10280 	andi.b		&0xf7,FPSR_CC(%a6)
10296 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10299 	mov.l		%d0,FP_SCR0_HI(%a6)
10300 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10301 	lea		FP_SCR0(%a6),%a0
10305 	mov.l		DST_EX(%a1),FP_SCR0_EX(%a6)
10308 	mov.l		%d0,FP_SCR0_HI(%a6)
10309 	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)
10310 	lea		FP_SCR0(%a6),%a1
10314 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10315 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10318 	mov.l		%d0,FP_SCR1_HI(%a6)
10321 	mov.l		%d0,FP_SCR0_HI(%a6)
10322 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10323 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10324 	lea		FP_SCR1(%a6),%a1
10325 	lea		FP_SCR0(%a6),%a0
10339 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10353 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10391 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
10394 	mov.b		DTAG(%a6),%d1
10396 	or.b		STAG(%a6),%d1
10401 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10402 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
10403 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10405 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10406 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10407 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10425 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10427 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10430 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10435 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10438 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10440 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
10446 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10448 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10452 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10454 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10457 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10462 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10467 	or.l		&ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex
10469 	mov.b		FPCR_ENABLE(%a6),%d1
10474 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
10476 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
10479 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
10484 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
10487 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10495 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10497 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10501 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10503 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10506 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10511 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10521 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10523 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10528 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10533 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10535 	mov.b		FPCR_ENABLE(%a6),%d1
10540 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10542 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10543 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10545 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
10546 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10553 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
10555 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10558 	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply
10562 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
10564 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10572 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10574 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10578 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10580 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10583 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10588 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10602 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
10604 	mov.l		L_SCR3(%a6),%d1
10611 	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply
10732 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
10735 	mov.b		DTAG(%a6),%d1
10737 	or.b		STAG(%a6),%d1		# combine src tags
10745 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10746 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
10747 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10749 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10750 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10751 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10761 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision,mode
10772 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10774 	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
10777 	fsgldiv.x	FP_SCR0(%a6),%fp0	# perform sgl divide
10782 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10785 	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
10787 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
10793 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10795 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10799 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10801 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10804 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute divide
10809 	or.l		%d1,USER_FPSR(%a6)	# save INEX,N
10820 	or.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
10822 	mov.b		FPCR_ENABLE(%a6),%d1
10827 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative
10829 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
10832 	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
10837 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
10840 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10848 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10850 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10854 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10856 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10861 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide
10866 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10868 	mov.b		FPCR_ENABLE(%a6),%d1
10873 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10875 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10876 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10878 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
10879 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10886 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
10888 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10891 	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide
10895 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
10897 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10905 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10907 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10914 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10916 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10919 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide
10924 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10938 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into %fp1
10946 	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide
11079 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11082 	mov.b		DTAG(%a6),%d1
11084 	or.b		STAG(%a6),%d1		# combine src tags
11095 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11098 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11100 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11105 	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits
11113 	mov.w		2+L_SCR3(%a6),%d1
11153 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11155 	mov.b		FPCR_ENABLE(%a6),%d1
11161 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
11163 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
11165 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
11171 	mov.b		L_SCR3(%a6),%d1
11187 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11189 	mov.l		L_SCR3(%a6),%d1
11193 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11202 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
11206 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11211 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11216 	or.l		%d1,USER_FPSR(%a6)	# save INEX,N
11218 	mov.b		FPCR_ENABLE(%a6),%d1
11223 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
11225 	lea		FP_SCR0(%a6),%a0	# pass: result addr
11226 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
11228 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
11229 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
11234 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
11236 	mov.l		L_SCR3(%a6),%d1
11240 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11245 	fadd.x		FP_SCR0(%a6),%fp1	# execute multiply
11249 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
11250 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
11258 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
11259 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
11263 	mov.l		L_SCR3(%a6),%d1
11275 	mov.l		L_SCR3(%a6),%d1
11286 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
11299 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
11301 	mov.l		L_SCR3(%a6),%d1
11307 	fadd.x		FP_SCR0(%a6),%fp1	# execute add
11402 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11411 	mov.b		3+L_SCR3(%a6),%d1
11416 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11421 	mov.b		&neg_bmask+z_bmask,FPSR_CC(%a6) # set NEG/Z
11429 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
11430 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
11431 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
11433 	clr.w		FP_SCR1_EX(%a6)
11434 	clr.l		FP_SCR1_HI(%a6)
11435 	clr.l		FP_SCR1_LO(%a6)
11439 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
11440 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
11441 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
11443 	clr.w		FP_SCR0_EX(%a6)
11444 	clr.l		FP_SCR0_HI(%a6)
11445 	clr.l		FP_SCR0_LO(%a6)
11468 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11478 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11482 	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
11532 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11535 	mov.b		DTAG(%a6),%d1
11537 	or.b		STAG(%a6),%d1		# combine src tags
11548 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11551 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11553 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11558 	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits
11566 	mov.w		2+L_SCR3(%a6),%d1
11606 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11608 	mov.b		FPCR_ENABLE(%a6),%d1
11614 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
11616 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
11618 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
11624 	mov.b		L_SCR3(%a6),%d1
11640 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11642 	mov.l		L_SCR3(%a6),%d1
11646 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11655 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
11659 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11664 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11669 	or.l		%d1,USER_FPSR(%a6)
11671 	mov.b		FPCR_ENABLE(%a6),%d1
11676 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
11678 	lea		FP_SCR0(%a6),%a0	# pass: result addr
11679 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
11681 	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
11682 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
11687 	fmovm.x		FP_SCR1(%a6),&0x40
11689 	mov.l		L_SCR3(%a6),%d1
11693 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11698 	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract
11702 	fmovm.x		&0x40,FP_SCR0(%a6)	# store result to stack
11703 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
11711 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
11712 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
11716 	mov.l		L_SCR3(%a6),%d1
11728 	mov.l		L_SCR3(%a6),%d1
11739 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
11752 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
11754 	mov.l		L_SCR3(%a6),%d1
11760 	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract
11854 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11863 	mov.b		3+L_SCR3(%a6),%d1
11868 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11873 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/NEG
11881 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
11882 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
11883 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
11885 	clr.w		FP_SCR1_EX(%a6)
11886 	clr.l		FP_SCR1_HI(%a6)
11887 	clr.l		FP_SCR1_LO(%a6)
11891 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
11892 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
11893 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
11895 	clr.w		FP_SCR0_EX(%a6)
11896 	clr.l		FP_SCR0_HI(%a6)
11897 	clr.l		FP_SCR0_LO(%a6)
11917 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11924 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11928 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
11977 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11979 	mov.b		STAG(%a6),%d1
11992 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11998 	or.l		%d1,USER_FPSR(%a6)	# set N,INEX
12009 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12010 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12011 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12028 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12029 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12030 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12046 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12048 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute
12053 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12057 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
12058 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
12064 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
12066 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
12073 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12074 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12075 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12091 	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
12098 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
12103 	fsqrt.x		FP_SCR0(%a6),%fp0	# execute square root
12108 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12111 	mov.b		FPCR_ENABLE(%a6),%d1
12116 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
12118 	lea		FP_SCR0(%a6),%a0	# pass: result addr
12119 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
12121 	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
12122 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
12130 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
12131 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
12132 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
12142 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
12143 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
12152 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12154 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform square root
12159 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12162 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
12164 	mov.b		FPCR_ENABLE(%a6),%d1
12173 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
12175 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
12177 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
12188 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
12196 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
12197 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
12205 	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
12209 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12211 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute
12216 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12252 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
12256 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
12264 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
12313 	mov.l		EXC_DREGS+0x0(%a6),%d0
12316 	mov.l		EXC_DREGS+0x4(%a6),%d0
12337 	mov.l		EXC_DREGS+0x8(%a6),%d0
12340 	mov.l		EXC_DREGS+0xc(%a6),%d0
12355 	mov.l		(%a6),%d0
12358 	mov.l		EXC_A7(%a6),%d0
12398 	mov.l		%d0,EXC_DREGS+0x0(%a6)
12401 	mov.l		%d0,EXC_DREGS+0x4(%a6)
12459 	mov.w		%d0,2+EXC_DREGS+0x0(%a6)
12462 	mov.w		%d0,2+EXC_DREGS+0x4(%a6)
12520 	mov.b		%d0,3+EXC_DREGS+0x0(%a6)
12523 	mov.b		%d0,3+EXC_DREGS+0x4(%a6)
12585 iareg0:	add.l		%d0,EXC_DREGS+0x8(%a6)
12587 iareg1:	add.l		%d0,EXC_DREGS+0xc(%a6)
12597 iareg6:	add.l		%d0,(%a6)
12599 iareg7:	mov.b		&mia7_flg,SPCOND_FLG(%a6)
12602 	add.l		%d0,EXC_A7(%a6)
12605 	addq.l		&0x2,EXC_A7(%a6)
12649 dareg0:	sub.l		%d0,EXC_DREGS+0x8(%a6)
12651 dareg1:	sub.l		%d0,EXC_DREGS+0xc(%a6)
12661 dareg6:	sub.l		%d0,(%a6)
12663 dareg7:	mov.b		&mda7_flg,SPCOND_FLG(%a6)
12666 	sub.l		%d0,EXC_A7(%a6)
12669 	subq.l		&0x2,EXC_A7(%a6)
12676 #	load_fpn1(): load FP register value into FP_SRC(a6).		#
12685 #	FP_SRC(a6) = value loaded from FP register file			#
12688 #	Using the index in d0, load FP_SRC(a6) with a number from the	#
12709 	mov.l		0+EXC_FP0(%a6), 0+FP_SRC(%a6)
12710 	mov.l		4+EXC_FP0(%a6), 4+FP_SRC(%a6)
12711 	mov.l		8+EXC_FP0(%a6), 8+FP_SRC(%a6)
12712 	lea		FP_SRC(%a6), %a0
12715 	mov.l		0+EXC_FP1(%a6), 0+FP_SRC(%a6)
12716 	mov.l		4+EXC_FP1(%a6), 4+FP_SRC(%a6)
12717 	mov.l		8+EXC_FP1(%a6), 8+FP_SRC(%a6)
12718 	lea		FP_SRC(%a6), %a0
12721 	fmovm.x		&0x20, FP_SRC(%a6)
12722 	lea		FP_SRC(%a6), %a0
12725 	fmovm.x		&0x10, FP_SRC(%a6)
12726 	lea		FP_SRC(%a6), %a0
12729 	fmovm.x		&0x08, FP_SRC(%a6)
12730 	lea		FP_SRC(%a6), %a0
12733 	fmovm.x		&0x04, FP_SRC(%a6)
12734 	lea		FP_SRC(%a6), %a0
12737 	fmovm.x		&0x02, FP_SRC(%a6)
12738 	lea		FP_SRC(%a6), %a0
12741 	fmovm.x		&0x01, FP_SRC(%a6)
12742 	lea		FP_SRC(%a6), %a0
12749 #	load_fpn2(): load FP register value into FP_DST(a6).		#
12758 #	FP_DST(a6) = value loaded from FP register file			#
12761 #	Using the index in d0, load FP_DST(a6) with a number from the	#
12782 	mov.l		0+EXC_FP0(%a6), 0+FP_DST(%a6)
12783 	mov.l		4+EXC_FP0(%a6), 4+FP_DST(%a6)
12784 	mov.l		8+EXC_FP0(%a6), 8+FP_DST(%a6)
12785 	lea		FP_DST(%a6), %a0
12788 	mov.l		0+EXC_FP1(%a6), 0+FP_DST(%a6)
12789 	mov.l		4+EXC_FP1(%a6), 4+FP_DST(%a6)
12790 	mov.l		8+EXC_FP1(%a6), 8+FP_DST(%a6)
12791 	lea		FP_DST(%a6), %a0
12794 	fmovm.x		&0x20, FP_DST(%a6)
12795 	lea		FP_DST(%a6), %a0
12798 	fmovm.x		&0x10, FP_DST(%a6)
12799 	lea		FP_DST(%a6), %a0
12802 	fmovm.x		&0x08, FP_DST(%a6)
12803 	lea		FP_DST(%a6), %a0
12806 	fmovm.x		&0x04, FP_DST(%a6)
12807 	lea		FP_DST(%a6), %a0
12810 	fmovm.x		&0x02, FP_DST(%a6)
12811 	lea		FP_DST(%a6), %a0
12814 	fmovm.x		&0x01, FP_DST(%a6)
12815 	lea		FP_DST(%a6), %a0
12857 	fmovm.x		&0x80, EXC_FP0(%a6)
12860 	fmovm.x		&0x80, EXC_FP1(%a6)
12903 #	FP_SRC(a6) = packed operand now as a binary FP number		#
12923 	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
12931 	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
12939 	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
12942 	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
12944 	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
12948 	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
12950 	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
13032 	mov.l		0x0(%a0),FP_SCR0_EX(%a6) # make a copy of input
13033 	mov.l		0x4(%a0),FP_SCR0_HI(%a6) # so we don't alter it
13034 	mov.l		0x8(%a0),FP_SCR0_LO(%a6)
13036 	lea		FP_SCR0(%a6),%a0
13057 #	( )  a6: pointer to original bcd value
13099 #	( )  a6: pointer to original bcd value
13343 	mov.l		USER_FPCR(%a6),%d3	# get user's FPCR
13412 	ori.w		&inx1a_mask,2+USER_FPSR(%a6) # set INEX1/AINEX
13431 #	FP_SCR0(a6) = bcd format result on the stack.			#
13583 	mov.l		(%a0),L_SCR2(%a6)	# save exponent for sign check
13586 	clr.b		BINDEC_FLG(%a6)	# clr norm/denorm flag
13587 	cmpi.b		STAG(%a6),&DENORM # is input a DENORM?
13609 	st		BINDEC_FLG(%a6)	# set flag for denorm
13619 	mov.l		(%a0),FP_SCR1(%a6)	# move input to work space
13620 	mov.l		4(%a0),FP_SCR1+4(%a6)	# move input to work space
13621 	mov.l		8(%a0),FP_SCR1+8(%a6)	# move input to work space
13622 	and.l		&0x7fffffff,FP_SCR1(%a6)	# create abs(X)
13650 	tst.b		BINDEC_FLG(%a6)	# check for denorm
13655 	mov.w		FP_SCR1(%a6),%d0	# move exp to d0
13656 	mov.w		&0x3fff,FP_SCR1(%a6)	# replace exponent with 0x3fff
13657 	fmov.x		FP_SCR1(%a6),%fp0	# now fp0 has 1.f
13729 	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
13808 	bfextu		USER_FPCR(%a6){&26:&2},%d1	# get initial rmode bits
13812 	tst.l		L_SCR2(%a6)	# test sign of original x
13896 	tst.b		BINDEC_FLG(%a6)	# check for denorm
13966 #	a2: x/ptr to FP_SCR1(a6)
13973 	fmov.x		%fp0,FP_SCR1(%a6)	# move Y to memory
13974 	lea.l		FP_SCR1(%a6),%a2	# load a2 with ptr to FP_SCR1
13978 	fmov.x		FP_SCR1(%a6),%fp0	# write adjusted Y back to fpu
13988 	mov.l		USER_FPCR(%a6),L_SCR1(%a6)	# save it for later
13989 	and.l		&0x00000030,USER_FPCR(%a6)	# set size to ext,
14007 #	a2: ptr to FP_SCR1(a6)/Unchanged
14008 #	a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
14019 	mov.l	L_SCR1(%a6),-(%sp)
14020 	mov.l	L_SCR2(%a6),-(%sp)
14022 	lea.l		FP_SCR1(%a6),%a0	# a0 is ptr to FP_SCR1(a6)
14023 	fmov.x		%fp0,(%a0)	# move Y to memory at FP_SCR1(a6)
14024 	tst.l		L_SCR2(%a6)	# test sign of original operand
14028 	mov.l	USER_FPSR(%a6),-(%sp)
14031 	fmov.l	USER_FPCR(%a6),%fpcr
14033 ##	mov.l		USER_FPCR(%a6),%d0	# ext prec/keep rnd mode
14036 	fint.x		FP_SCR1(%a6),%fp0	# do fint()
14038 	or.w	%d0,FPSR_EXCEPT(%a6)
14041 ##	or.w		%d0,FPSR_EXCEPT(%a6)
14043 	mov.b	(%sp),USER_FPSR(%a6)
14046 	mov.l	(%sp)+,L_SCR2(%a6)
14047 	mov.l	(%sp)+,L_SCR1(%a6)
14050 	mov.l	L_SCR2(%a6),FP_SCR1(%a6)	# restore original exponent
14051 	mov.l	L_SCR1(%a6),USER_FPCR(%a6)	# restore user's FPCR
14075 #	a2: ptr to FP_SCR1(a6)/Unchanged
14107 	tst.b		BINDEC_FLG(%a6)	# check if input was norm
14184 #	a2: ptr to FP_SCR1(a6)/Unchanged
14196 	lea.l		FP_SCR0(%a6),%a0
14233 #      Digits are stored in L_SCR1(a6) on return from BINDEC as:
14254 #	a0: ptr to result string/ptr to L_SCR1(a6)
14256 #	a2: ptr to FP_SCR1(a6)/Unchanged
14266 	tst.b		BINDEC_FLG(%a6)	# check for denorm
14292 	fmov.x		%fp0,FP_SCR1(%a6)	# store fp0 in memory
14309 	lea.l		L_SCR1(%a6),%a0	# a0 is ptr to L_SCR1 for exp digits
14311 	mov.l		L_SCR1(%a6),%d0	# load L_SCR1 lword to d0
14314 	bfins		%d0,FP_SCR0(%a6){&4:&12}	# put e3:e2:e1 in FP_SCR0
14316 	bfins		%d0,FP_SCR0(%a6){&16:&4}	# put e4 in FP_SCR0
14319 	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
14334 #	a0: ptr to L_SCR1(a6)/Unchanged
14336 #	a2: ptr to FP_SCR1(a6)/Unchanged
14347 	and.b		&0x0f,FP_SCR0(%a6)	# clear first nibble of FP_SCR0
14348 	tst.l		L_SCR2(%a6)	# check sign of original mantissa
14356 	bfins		%d0,FP_SCR0(%a6){&0:&2}	# insert SM and SE into FP_SCR0
14579 	mov.w		&0x0121,EXC_VOFF(%a6)		# set FSLW
14586 	mov.w		&0x0141,EXC_VOFF(%a6)		# set FSLW
14593 	mov.w		&0x0101,EXC_VOFF(%a6)		# set FSLW
14600 	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
14607 	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
14616 	mov.w		&0x00a1,EXC_VOFF(%a6)		# set FSLW
14623 	mov.w		&0x00c1,EXC_VOFF(%a6)		# set FSLW
14630 	mov.w		&0x0081,EXC_VOFF(%a6)		# set FSLW
14637 	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
14644 	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
14649 	mov.l		USER_FPIAR(%a6),EXC_PC(%a6) # store current PC
14651 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
14652 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
14653 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
14655 	unlk		%a6
14679 	mov.b		EXC_OPWORD+0x1(%a6),%d1
14688 	mov.b		EXC_OPWORD+0x1(%a6),%d1
14705 	sub.l		%d0,EXC_DREGS+0x8(%a6)	# fix stacked a0
14708 	sub.l		%d0,EXC_DREGS+0xc(%a6)	# fix stacked a1
14723 	sub.l		%d0,(%a6)		# fix stacked a6
14731 	cmpi.b		EXC_VOFF(%a6),&0x30	# move in or out?
14734 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?

Indexes created Wed May 08 10:03:12 MDT 2024