Lines Matching defs:or
24 so long as this entire notice is retained without alteration in any modified and/or
26 No licenses are granted by implication, estoppel or otherwise under any patents
27 or trademarks of Motorola, Inc.
588 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
589 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
613 # exception is enabled or disabled in the FPCR. For the disabled case, #
616 # then stored in either the FP regfile, data regfile, or memory. #
673 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
683 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
717 # traps are enabled or disabled.
828 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
829 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
853 # exception is enabled or disabled in the FPCR. For the disabled case, #
856 # then stored in either the FP regfile, data regfile, or memory. #
911 btst &0x5,1+EXC_CMDREG(%a6) # is op monadic or dyadic?
926 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1025 # But, whether bogus or not, if inexact is enabled AND it occurred,
1103 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
1104 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
1140 # Two main instruction types can enter here: (1) DENORM or UNNORM #
1141 # unimplemented data types. These can be either opclass 0,2 or 3 #
1143 # also of opclasses 0,2, or 3. #
1164 # _fpsp_done() or through _real_trace() if a Trace exception is pending #
1168 # _real_unfl(), or _real_ovfl() as appropriate. PACKED opclass 3 #
1213 btst &0x5,EXC_SR(%a6) # user or supervisor mode?
1219 # if the exception is an opclass zero or two unimplemented data type
1260 # precision format if the src format was single or double and the
1261 # source data type was an INF, NAN, DENORM, or UNNORM
1265 # we don't know whether the src operand or the dst operand (or both) is the
1266 # UNNORM or DENORM. call the function that tags the operand type. if the
1267 # input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
1272 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1281 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
1292 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1329 cmpi.b %d0,&0x38 # is instr fcmp or ftst?
1356 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1375 # * this is the case where we must call _real_inex() now or else
1399 bsr.l funimp_skew # skew sgl or dbl inputs
1426 # or double precision denorm, inf, or nan, the operand needs to be
1456 or.w %d0,LOCAL_EX(%a0) # insert new exponent
1488 or.w %d0,LOCAL_EX(%a0) # insert new exponent
1514 # the src can ONLY be a DENORM or an UNNORM! so, don't make any big subroutine
1557 # on extended precision opclass three instructions using pre-decrement or
1732 mov.l %a0,%usp # to or not...
1757 # frame or it will get overwritten when the exc stack frame is shifted "down".
1826 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
1837 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1874 cmpi.b %d0,&0x38 # is instr fcmp or ftst?
1882 btst &0x5,EXC_SR(%a6) # user or supervisor?
1934 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1953 # * this is the case where we must call _real_inex() now or else
1963 cmpi.b %d0,&0x6 # is exception INEX? (6 or 7)
1979 btst &0x5,EXC_SR(%a6) # user or supervisor?
2082 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
2113 btst &0x5,EXC_SR(%a6) # user or supervisor?
2297 # have to make sure that for single or double source operands that the
2374 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
2375 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
2402 # (1) FP Instructions using extended precision or packed immediate #
2405 # (3) The "fmovm.l" instruction w/ 2 or 3 control registers. #
2415 # FPU before exiting. In either the enabled or disabled cases, we #
2504 btst &0xa,%d0 # is src fmt x or p?
2528 # The packed operand is an INF or a NAN if the exponent field is all ones.
2530 cmpi.w %d0,&0x7fff # INF or NAN?
2531 beq.b iea_op_setsrc # operand is an INF or NAN
2561 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
2579 # the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
2609 # OPERR : all reg-reg or mem-reg operations that can normally operr
2622 # now, we save the result, unless, of course, the operation was ftst or fcmp.
2670 # or underflow that was disabled, then we have to force an overflow or
2736 btst &14,%d0 # ctrl or data reg
2741 btst &0x5,EXC_SR(%a6) # user or supervisor mode
2973 # the instruction is a fmovm.l with 2 or 3 registers.
3033 btst &0x5,(%sp) # user or supervisor mode?
3095 # operr result out to memory or data register file as it should. #
3131 # this would be the case for opclass two operations with a source infinity or
3132 # denorm operand in the sgl or dbl format. NANs also become skewed, but can't
3156 # operand and save the appropriate minimum or maximum integer value
3170 # the operand is either an infinity or a QNAN.
3266 # _calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea> #
3285 # SNAN result out to memory or data register file as it should. #
3293 # if the effective addressing mode was -() or ()+, then the address #
3327 # this would be the case for opclass two operations with a source infinity or
3328 # denorm operand in the sgl or dbl format. NANs also become skewed and must be
3354 # operand and save the appropriate minimum or maximum integer value
3433 or.l %d1,%d0 # create sgl SNAN
3448 or.l %d1,%d0 # create sgl SNAN
3462 or.l %d1,FP_SCR0_EX(%a6) # create dbl hi
3469 or.l %d1,FP_SCR0_HI(%a6) # create dbl lo
3480 # for extended precision, if the addressing mode is pre-decrement or
3562 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3563 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
3587 # inexact result out to memory or data register file as it should. #
3655 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
3668 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
3791 # in the sgl or dbl format.
3830 # can occur because then FPU is disabled or the instruction is to be #
3891 or.w %d1,%d0 # concat mode,reg
3925 cmpi.b %d0,&0xc # is opsize ext or packed?
4253 # (1): postincrement or control addressing mode #
4289 btst &0x5,EXC_EXTWORD(%a6) # is it a move in or out?
4296 btst &0x4,EXC_EXTWORD(%a6) # control or predecrement?
4306 btst &0x5,EXC_SR(%a6) # user or supervisor mode?
4524 # or control bit string.
4968 btst &0xb,%d2 # is it word or long?
5064 btst &0xb,%d2 # is index word or long?
5108 btst &0xb,%d5 # is index word or long?
5189 btst &0x2,%d5 # pre or post indexing?
5404 # DST exponent was scaled by. If the SRC exponent is greater or equal, #
5455 or.w %d1,%d0 # concat {sgn,new exp}
5491 or.w %d1,%d0 # concat {sgn,new exp}
5537 or.w &0x3fff,%d0 # insert new operand's exponent(=0)
5593 btst &0x0,%d1 # is exp even or odd?
5615 btst &0x0,%d0 # is exp even or odd?
5664 or.w &0x3fff,%d0 # insert new operand's exponent(=0)
5733 or.l &nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5739 or.l &nan_mask, USER_FPSR(%a6)
5743 or.l &nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5751 or.l &aiop_mask+snan_mask, USER_FPSR(%a6)
5753 or.l &nan_mask, USER_FPSR(%a6)
5757 or.l &neg_mask, USER_FPSR(%a6)
5786 or.l &nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
5946 or.b %d2, 3+FTEMP_LO2(%a6)
5996 # subtle step here; or in the g,r,s at the bottom of FTEMP_LO to minimize
6000 or.b %d2, 3+FTEMP_LO2(%a6)
6178 or.w &inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex
6345 bne.b ext_grs_not_ext # no; go handle sgl or dbl
6378 and.l &0x0000003f, %d2 # s bit is the or of all other
6403 and.l &0x000001ff, %d2 # s bit is the or-ing of all
6453 or.l %d3, %d0 # create hi(man)
6482 # unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO #
6495 # d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO #
6496 # a0 = input operand has been converted to a norm, denorm, or #
6532 or.w %d0, %d1 # {sgn,new exp}
6806 # d0.b = result FPSR_cc which caller may or may not want to save #
6980 or.b %d0,%d1 # concat the two
6988 or.b %d0, %d1 # insert rnd mode
6990 or.b %d0, %d1 # insert rnd prec
7051 # fout(): move from fp register to memory or data register #
7073 # fp0 : intermediate underflow or overflow result if #
7074 # OVFL/UNFL occurred for a sgl or dbl operand #
7080 # it's b,w,l,s,d,x, or p in size. b,w,l can be stored to either a data #
7081 # register or memory. The algorithm uses a standard "fmove" to create #
7084 # For sgl or dbl precision, overflow or underflow can occur. If #
7091 # word or a data register. The <ea> must be fixed as w/ extended #
7122 # is either a DENORM or a NORM.
7136 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7168 # is either a DENORM or a NORM.
7182 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7214 # is either a DENORM or a NORM.
7228 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7261 # is either a DENORM or a NORM.
7282 # in the pre-decrement case from supervisor mode or else we'll corrupt
7301 andi.b &0x0a,%d0 # is UNFL or INEX enabled?
7323 or.w %d0,FP_SCR0_EX(%a6) # insert new exponent
7341 # would cause either an underflow or overflow. these cases are handled
7369 or.w %d1,2+USER_FPSR(%a6) # set possible inex2/ainex
7438 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7488 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7579 # would cause either an underflow or overflow. these cases are handled
7607 or.w %d0,2+USER_FPSR(%a6) # set possible inex2/ainex
7659 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7699 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7785 or.l %d1,%d0 # put these bits in ms word of double
7794 or.l %d0,%d1 # put them in double result
7851 or.l %d1,%d0 # put these bits in ms word of single
7863 btst &0x4,EXC_CMDREG(%a6) # static or dynamic?
8015 or.b STAG(%a6),%d1 # combine src tags
8064 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8074 or.w %d2,%d1 # concat old sign,new exp
8086 # - if overflow or inexact is enabled, we need a multiply result rounded to
8088 # result. if the original operation was single or double, we have to do another
8104 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8108 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8111 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8120 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
8127 # with an extra -0x6000. if the precision is single or double, we need to
8133 bne.b fmul_ovfl_ena_sd # it's sgl or dbl
8146 or.w %d2,%d1 # concat old sign,new exp
8182 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8197 # - if overflow or inexact is enabled, we need a multiply result rounded to
8199 # result. if the original operation was single or double, we have to do another
8220 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8223 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
8232 or.b %d0,FPSR_CC(%a6) # unf_res2 may have set 'Z'
8244 bne.b fmul_unfl_ena_sd # no, sgl or dbl
8266 or.w %d2,%d1 # concat old sign,new exp
8293 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8302 # we don't know if the result was an underflow that rounded up to a 2 or
8401 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8425 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8442 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8476 # or ovf_res() to return the default result. Also return EXOP if #
8505 bne.w fin_not_ext # no, so go handle dbl or sgl
8509 # or overflow because of rounding to the correct precision. so...
8525 bne.w fin_not_ext # no, so go handle dbl or sgl
8553 or.w %d1,%d0 # concat new exo,old sign
8559 # operand is to be rounded to single or double precision
8581 # operand will NOT overflow or underflow when moved into the fp reg file
8592 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8602 or.w %d1,%d2 # concat old sign,new exponent
8634 # if underflow or inexact is enabled, then go calculate the EXOP first.
8637 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
8644 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
8649 # operand will underflow AND underflow or inexact is enabled.
8664 or.w %d1,%d2 # concat old sign,new exp
8682 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8685 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8688 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8700 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
8718 or.w %d2,%d1
8736 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8833 or.b STAG(%a6),%d1 # combine src tags
8878 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8888 or.w %d2,%d1 # concat old sign,new exp
8916 or.l %d0,USER_FPSR(%a6) # save INEX,N
8928 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8931 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8939 or.b %d0,FPSR_CC(%a6) # set INF if applicable
8946 bne.b fdiv_ovfl_ena_sd # no, do sgl or dbl
8959 or.w %d2,%d1 # concat old sign,new exp
8990 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8993 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
9002 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
9014 bne.b fdiv_unfl_ena_sd # no, sgl or dbl
9034 or.w %d2,%d1 # concat old sign,new exp
9061 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9071 # or a normalized number that rounded down to a 1. so, redo the entire
9167 mov.b DST_EX(%a1),%d1 # or of input signs.
9199 # The destination was an INF w/ an In Range or ZERO source, the result is
9278 bne.w fneg_not_ext # no; go handle sgl or dbl
9282 # or overflow because of rounding to the correct precision. so...
9302 bne.b fneg_not_ext # no; go handle sgl or dbl
9333 or.w %d1,%d0 # concat old sign, new exponent
9339 # operand is either single or double
9361 # operand will NOT overflow or underflow when moved in to the fp reg file
9372 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9382 or.w %d1,%d2 # concat old sign,new exp
9414 # if underflow or inexact is enabled, go calculate EXOP first.
9417 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
9424 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
9444 or.w %d2,%d1 # concat new sign,new exp
9462 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9465 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
9468 andi.b &0x13,%d1 # is OVFL or INEX enabled?
9480 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
9498 or.w %d2,%d1 # concat sign,exp
9516 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9653 # norms. Denorms are so low that the answer will either be a zero or a #
9678 or.l %d0,USER_FPSR(%a6) # set exception bits
9699 # for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
9701 # so, we could either set these manually or force the DENORM
9759 # norms. Denorms are so low that the answer will either be a zero or a #
9780 or.l %d0,USER_FPSR(%a6) # set exception bits
9803 # so, we could either set these manually or force the DENORM
9871 # exponent would take an exception. If so, use unf_res() or ovf_res() #
9901 bne.b fabs_not_ext # no; go handle sgl or dbl
9905 # or overflow because of rounding to the correct precision. so...
9951 or.w %d1,%d0 # concat old sign, new exponent
9957 # operand is either single or double
9979 # operand will NOT overflow or underflow when moved in to the fp reg file
9990 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10000 or.w %d1,%d2 # concat old sign,new exp
10030 # if underflow or inexact is enabled, go calculate EXOP first.
10032 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10039 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
10059 or.w %d2,%d1 # concat new sign,new exp
10077 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10080 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
10083 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10095 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
10113 or.w %d2,%d1 # concat sign,exp
10131 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10192 or.b STAG(%a6),%d1
10273 # 'N' bit for a negative QNAN or SNAN input so we must squelch it here.
10287 # If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
10291 # (1) signs are (+) and the DENORM is the dst or
10396 or.b STAG(%a6),%d1
10435 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10445 or.w %d2,%d1 # concat old sign,new exp
10462 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10467 or.l &ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex
10470 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10479 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
10494 or.w %d2,%d1 # concat old sign,new exp
10511 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10533 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10536 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10545 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
10571 or.w %d2,%d1 # concat old sign,new exp
10588 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10597 # we don't know if the result was an underflow that rounded up to a 2 or
10737 or.b STAG(%a6),%d1 # combine src tags
10782 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10792 or.w %d2,%d1 # concat old sign,new exp
10809 or.l %d1,USER_FPSR(%a6) # save INEX,N
10820 or.w &ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
10823 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10832 or.b %d0,FPSR_CC(%a6) # set INF if applicable
10847 or.w %d2,%d1 # concat old sign,new exp
10866 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10869 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10878 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
10904 or.w %d2,%d1 # concat old sign, new exp
10924 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10934 # or a normalized number that rounded down to a 1. so, redo the entire
11084 or.b STAG(%a6),%d1 # combine src tags
11105 or.l %d1,USER_FPSR(%a6) # save exc and ccode bits
11130 or.w %d2,%d1 # concat sign,new exp
11153 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11156 andi.b &0x13,%d1 # is OVFL or INEX enabled?
11165 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
11173 bne.b fadd_ovfl_ena_sd # no; prec = sgl or dbl
11180 or.w %d2,%d1 # concat sign,new exp
11216 or.l %d1,USER_FPSR(%a6) # save INEX,N
11219 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
11228 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
11238 bne.b fadd_unfl_ena_sd # no; sgl or dbl
11257 or.w %d2,%d1 # concat sign,new exp
11295 # rounded "up" or a normalized number rounded "down".
11297 # seeing if the new result is smaller or equal to the current result.
11397 # the signs are the same. so determine whether they are positive or negative
11399 tst.b %d0 # are ZEROes positive or negative?
11407 # - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
11425 # one operand is a ZERO and the other is a DENORM or NORM. scale
11426 # the DENORM or NORM and jump to the regular fadd routine.
11453 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
11537 or.b STAG(%a6),%d1 # combine src tags
11558 or.l %d1,USER_FPSR(%a6) # save exc and ccode bits
11583 or.w %d2,%d1 # insert new exponent
11606 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11609 andi.b &0x13,%d1 # is OVFL or INEX enabled?
11618 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
11633 or.w %d2,%d1 # concat sign,exp
11669 or.l %d1,USER_FPSR(%a6)
11672 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
11681 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
11710 or.w %d2,%d1 # concat sgn,exp
11748 # rounded "up" or a normalized number rounded "down".
11750 # seeing if the new result is smaller or equal to the current result.
11859 # - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
11877 # one operand is a ZERO and the other is a DENORM or a NORM.
11878 # scale the DENORM or NORM and jump to the regular fsub routine.
11905 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
11990 bne.b fsqrt_not_ext # no; go handle sgl or dbl
11998 or.l %d1,USER_FPSR(%a6) # set N,INEX
12007 bne.b fsqrt_not_ext # no; go handle sgl or dbl
12018 # operand is either single or double
12042 # operand will NOT overflow or underflow when moved in to the fp reg file
12053 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12063 or.w %d1,%d2 # concat old sign,new exp
12088 # the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
12108 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12110 # if underflow or inexact is enabled, go calculate EXOP first.
12112 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
12121 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
12141 or.w %d2,%d1 # concat new sign,new exp
12159 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12162 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
12165 andi.b &0x13,%d1 # is OVFL or INEX enabled?
12177 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
12195 or.w %d2,%d1 # concat sign,exp
12216 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12248 tst.b SRC_EX(%a0) # is ZERO positive or negative?
12260 tst.b SRC_EX(%a0) # is INF positive or negative?
12836 # value in d0. The FP number can be DENORM or SNAN so we have to be #
12907 # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
12910 # If the packed operand is a ZERO,NAN, or INF, convert it to #
12930 # The packed operand is an INF or a NAN if the exponent field is all ones.
12932 cmpi.w %d0,&0x7fff # INF or NAN?
12934 rts # operand is an INF or NAN
13006 # Clean up and return. Check if the final mul or div was inexact. #
13079 or.l &0x40000000,%d4 # set SE in d4,
13080 or.l &0x40000000,(%a0) # and in working bcd
13175 # of 27 or less are exact, there is no need to use this routine to
13194 # and do append (+) or strip (-) zeros accordingly.
13230 or.l &0x40000000,%d4 # and set SE in d4
13231 or.l &0x40000000,(%a0) # and in memory
13369 or.l &0x40000000,(%a0) # and set SE bit
13426 # the input may be either normalized, unnormalized, or #
13438 # input. If input is unnormalized or denormalized, #
13459 # if it is a positive number, or the number of digits #
13487 # compensated for by 'or-ing' in the INEX2 flag to #
13500 # or less than LEN -1 digits, adjust ILOG and repeat from #
13686 # a positive number, or the number of digits after the
13729 or.l &opaop_mask,USER_FPSR(%a6) # set OPERR & AIOP in USER_FPSR
13767 # d2: x/0 or 24 for A9
13771 # d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
13870 # d2: 0 or 24/unchanged
13920 or.w %d3,(%sp) # insert new exponent
13953 # for by 'or-ing' in the INEX2 flag to the lsb of Y.
13977 or.l &1,8(%a2) # or in 1 to lsb of mantissa
14026 or.l &0x80000000,(%a0) # if neg, use -Y
14038 or.w %d0,FPSR_EXCEPT(%a6)
14041 ## or.w %d0,FPSR_EXCEPT(%a6)
14055 # or less than LEN -1 digits, adjust ILOG and repeat from
14269 fbeq.w den_zero # if zero, use k-factor or 4933
14319 or.l &opaop_mask,USER_FPSR(%a6) # set OPERR & AIOP in USER_FPSR
14495 or.l %d6,%d2 # or in msbs from d3 into d2
14664 btst &0x5,(%sp) # supervisor or user mode?
14673 # if the effective addressing mode was predecrement or postincrement,
14731 cmpi.b EXC_VOFF(%a6),&0x30 # move in or out?
14734 btst &0x5,EXC_SR(%a6) # user or supervisor?