ifpsp060/src/fpsp.S

703 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
789 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
1063 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
1254 # so, since the emulation routines re-create them anyways, zero exception field
1255 	andi.l		&0x00ff00ff,USER_FPSR(%a6) # zero exception field
1372 #	shift enabled exception field into lo byte of d0;
1508 # so, since the emulation routines re-create them anyways, zero exception field.
1510 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
1810 # so, since the emulation routines re-create them anyways, zero exception field
1811 	andi.l		&0x0ff00ff,USER_FPSR(%a6) # zero exception field
1914 # shift the stack frame "up". we don't really care about the <ea> field.
1950 #	shift enabled exception field into lo byte of d0;
2028 # shift stack frame "up". who cares about <ea> field.
2067 # so, since the emulation routines re-create them anyways, zero exception field.
2069 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
2529 # The packed operand is an INF or a NAN if the exponent field is all ones.
2999 # the <ea> field is let as undefined.
3190 	bfextu		%d0{&19:&3},%d0		# extract dst format field
3360 	bfextu		%d0{&19:&3},%d0		# extract dst format field
3635 # Here, we zero the ccode and exception byte field since we're going to
3640 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
3730 	andi.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
3837 # non-zero <ea> field. These may get flagged as "Line F" but should	#
4058 # Divide the fp instructions into 8 types based on the TYPE field in
4260 	bfextu		%d0{&10:&3},%d1		# extract mode field
6828 #		are the sign and biased exponent field of |X|; the	#
10690 # sto_cos(): store fp1 to the fpreg designated by the CMDREG dst field.	#
16872 # eliminate the effective address field.
17431 # only difference is that the <ea> field should hold the PC
17432 # of the ftrapcc instruction and the vector offset field
17441 # eliminate the effective address field.
18137 # eliminate the effective address field.
18531 	andi.w		&0x3f,%d0		# extract mode field
18532 	andi.l		&0x7,%d1		# extract reg  field
19369 	andi.w		&0x38, %d0		# extract mode field
19370 	andi.l		&0x7, %d1		# extract reg  field
19452 	andi.w		&0x38,%d0		# extract mode field
19453 	andi.l		&0x7,%d1		# extract reg  field
19639 	bfextu		EXC_CMDREG(%a6){&6:&3}, %d0 # extract dst field
19650 	bfextu		EXC_CMDREG(%a6){&3:&3}, %d0 # extract src field
19682 	bfextu		EXC_CMDREG(%a6){&6:&3}, %d0 # extract dst field
19693 	bfextu		EXC_CMDREG(%a6){&3:&3}, %d0 # extract src type field
19695 	bfextu		EXC_OPWORD(%a6){&10:&3}, %d1 # extract <ea> mode field
19700 	bfextu		EXC_OPWORD(%a6){&13:&3}, %d1 # extract src reg field
19795 #	%d0 : src type field						#
19800 	mov.w		(tbl_fp_type.b,%pc,%d0.w*2), %d0 # index by src type field
20365 # 16-bit field gets zeroed. we do this since we promise not to disturb
20368 	clr.w		2+FP_SCR0_EX(%a6)	# clear reserved field
20974 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch static field
22035 #	The result is not typed - the tag field is invalid.  The	#
22970 # The packed operand is an INF or a NAN if the exponent field is all ones.
24480 # A3. Multiply the fraction in d2:d3 by 8 using bit-field		#
24508 #		d6: temp for bit-field extracts