m68k/ifpsp060/fskeleton.S

70 | This is the exit point for the 060FPSP when an enabled overflow exception
72 | for enabled overflow conditions. The exception stack frame is an overflow
75 | The sample routine below simply clears the exception status bit and
89 | This is the exit point for the 060FPSP when an enabled underflow exception
91 | for enabled underflow conditions. The exception stack frame is an underflow
94 | The sample routine below simply clears the exception status bit and
107 | This is the exit point for the 060FPSP when an enabled operand error exception
109 | for enabled operand error exceptions. The exception stack frame is an operand error
113 | The sample routine below simply clears the exception status bit and
126 | This is the exit point for the 060FPSP when an enabled signalling NaN exception
128 | for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
132 | The sample routine below simply clears the exception status bit and
145 | This is the exit point for the 060FPSP when an enabled divide-by-zero exception
147 | for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
151 | The sample routine below simply clears the exception status bit and
164 | This is the exit point for the 060FPSP when an enabled inexact exception
166 | for enabled inexact exceptions. The exception stack frame is an inexact
170 | The sample routine below simply clears the exception status bit and
183 | This is the exit point for the 060FPSP when an enabled bsun exception
185 | for enabled bsun exceptions. The exception stack frame is a bsun
188 | The sample routine below clears the exception status bit, clears the NaN
205 | This is the exit point for the 060FPSP when an F-Line Illegal exception is
206 | encountered. Three different types of exceptions can enter the F-Line exception
219 | This is the exit point for the 060FPSP when an FPU disabled exception is
220 | encountered. Three different types of exceptions can enter the F-Line exception
226 | The sample code below enables the FPU, sets the PC field in the exception stack
227 | frame to the PC of the instruction causing the exception, and does an "rte".
247 | system handler for the trap exception vector number 7.