include/asm/inst.h

415 static inline bool is_break_ins(union loongarch_instruction *ip)
417 	return ip->reg0i15_format.opcode == break_op;
420 static inline bool is_pc_ins(union loongarch_instruction *ip)
422 	return ip->reg1i20_format.opcode >= pcaddi_op &&
423 			ip->reg1i20_format.opcode <= pcaddu18i_op;
426 static inline bool is_branch_ins(union loongarch_instruction *ip)
428 	return ip->reg1i21_format.opcode >= beqz_op &&
429 		ip->reg1i21_format.opcode <= bgeu_op;
432 static inline bool is_ra_save_ins(union loongarch_instruction *ip)
435 	return ip->reg2i12_format.opcode == std_op &&
436 		ip->reg2i12_format.rj == LOONGARCH_GPR_SP &&
437 		ip->reg2i12_format.rd == LOONGARCH_GPR_RA &&
438 		!is_imm12_negative(ip->reg2i12_format.immediate);
441 static inline bool is_stack_alloc_ins(union loongarch_instruction *ip)
444 	return ip->reg2i12_format.opcode == addid_op &&
445 		ip->reg2i12_format.rj == LOONGARCH_GPR_SP &&
446 		ip->reg2i12_format.rd == LOONGARCH_GPR_SP &&
447 		is_imm12_negative(ip->reg2i12_format.immediate);
450 static inline bool is_self_loop_ins(union loongarch_instruction *ip, struct pt_regs *regs)
452 	switch (ip->reg0i26_format.opcode) {
455 		if (ip->reg0i26_format.immediate_l == 0
456 		    && ip->reg0i26_format.immediate_h == 0)
460 	switch (ip->reg1i21_format.opcode) {
464 		if (ip->reg1i21_format.immediate_l == 0
465 		    && ip->reg1i21_format.immediate_h == 0)
469 	switch (ip->reg2i16_format.opcode) {
476 		if (ip->reg2i16_format.immediate == 0)
480 		if (regs->regs[ip->reg2i16_format.rj] +
481 		    ((unsigned long)ip->reg2i16_format.immediate << 2) == (unsigned long)ip)