Lines Matching refs:regs
10 static inline bool csky_insn_reg_get_val(struct pt_regs *regs,
15 *ptr = *(®s->a0 + index);
18 *ptr = *(®s->exregs[0] + index - 16);
22 *ptr = regs->usp;
25 *ptr = regs->lr;
28 *ptr = regs->tls;
39 static inline bool csky_insn_reg_set_val(struct pt_regs *regs,
44 *(®s->a0 + index) = val;
47 *(®s->exregs[0] + index - 16) = val;
51 regs->usp = val;
54 regs->lr = val;
57 regs->tls = val;
69 simulate_br16(u32 opcode, long addr, struct pt_regs *regs)
71 instruction_pointer_set(regs,
76 simulate_br32(u32 opcode, long addr, struct pt_regs *regs)
78 instruction_pointer_set(regs,
83 simulate_bt16(u32 opcode, long addr, struct pt_regs *regs)
85 if (regs->sr & 1)
86 instruction_pointer_set(regs,
89 instruction_pointer_set(regs, addr + 2);
93 simulate_bt32(u32 opcode, long addr, struct pt_regs *regs)
95 if (regs->sr & 1)
96 instruction_pointer_set(regs,
99 instruction_pointer_set(regs, addr + 4);
103 simulate_bf16(u32 opcode, long addr, struct pt_regs *regs)
105 if (!(regs->sr & 1))
106 instruction_pointer_set(regs,
109 instruction_pointer_set(regs, addr + 2);
113 simulate_bf32(u32 opcode, long addr, struct pt_regs *regs)
115 if (!(regs->sr & 1))
116 instruction_pointer_set(regs,
119 instruction_pointer_set(regs, addr + 4);
123 simulate_jmp16(u32 opcode, long addr, struct pt_regs *regs)
127 csky_insn_reg_get_val(regs, tmp, &tmp);
129 instruction_pointer_set(regs, tmp & 0xfffffffe);
133 simulate_jmp32(u32 opcode, long addr, struct pt_regs *regs)
137 csky_insn_reg_get_val(regs, tmp, &tmp);
139 instruction_pointer_set(regs, tmp & 0xfffffffe);
143 simulate_jsr16(u32 opcode, long addr, struct pt_regs *regs)
147 csky_insn_reg_get_val(regs, tmp, &tmp);
149 regs->lr = addr + 2;
151 instruction_pointer_set(regs, tmp & 0xfffffffe);
155 simulate_jsr32(u32 opcode, long addr, struct pt_regs *regs)
159 csky_insn_reg_get_val(regs, tmp, &tmp);
161 regs->lr = addr + 4;
163 instruction_pointer_set(regs, tmp & 0xfffffffe);
167 simulate_lrw16(u32 opcode, long addr, struct pt_regs *regs)
175 val = *(unsigned int *)(instruction_pointer(regs) + offset);
177 csky_insn_reg_set_val(regs, tmp, val);
181 simulate_lrw32(u32 opcode, long addr, struct pt_regs *regs)
188 ((instruction_pointer(regs) + offset) & 0xfffffffc);
190 csky_insn_reg_set_val(regs, tmp, val);
194 simulate_pop16(u32 opcode, long addr, struct pt_regs *regs)
196 unsigned long *tmp = (unsigned long *)regs->usp;
200 csky_insn_reg_set_val(regs, i + 4, *tmp);
205 csky_insn_reg_set_val(regs, 15, *tmp);
209 regs->usp = (unsigned long)tmp;
211 instruction_pointer_set(regs, regs->lr);
215 simulate_pop32(u32 opcode, long addr, struct pt_regs *regs)
217 unsigned long *tmp = (unsigned long *)regs->usp;
221 csky_insn_reg_set_val(regs, i + 4, *tmp);
226 csky_insn_reg_set_val(regs, 15, *tmp);
231 csky_insn_reg_set_val(regs, i + 16, *tmp);
236 csky_insn_reg_set_val(regs, 29, *tmp);
240 regs->usp = (unsigned long)tmp;
242 instruction_pointer_set(regs, regs->lr);
246 simulate_bez32(u32 opcode, long addr, struct pt_regs *regs)
250 csky_insn_reg_get_val(regs, tmp, &tmp);
253 instruction_pointer_set(regs,
256 instruction_pointer_set(regs, addr + 4);
260 simulate_bnez32(u32 opcode, long addr, struct pt_regs *regs)
264 csky_insn_reg_get_val(regs, tmp, &tmp);
267 instruction_pointer_set(regs,
270 instruction_pointer_set(regs, addr + 4);
274 simulate_bnezad32(u32 opcode, long addr, struct pt_regs *regs)
279 csky_insn_reg_get_val(regs, tmp, (unsigned long *)&val);
284 instruction_pointer_set(regs,
287 instruction_pointer_set(regs, addr + 4);
289 csky_insn_reg_set_val(regs, tmp, (unsigned long)val);
293 simulate_bhsz32(u32 opcode, long addr, struct pt_regs *regs)
298 csky_insn_reg_get_val(regs, tmp, &val);
301 instruction_pointer_set(regs,
304 instruction_pointer_set(regs, addr + 4);
308 simulate_bhz32(u32 opcode, long addr, struct pt_regs *regs)
313 csky_insn_reg_get_val(regs, tmp, &val);
316 instruction_pointer_set(regs,
319 instruction_pointer_set(regs, addr + 4);
323 simulate_blsz32(u32 opcode, long addr, struct pt_regs *regs)
328 csky_insn_reg_get_val(regs, tmp, &val);
331 instruction_pointer_set(regs,
334 instruction_pointer_set(regs, addr + 4);
338 simulate_blz32(u32 opcode, long addr, struct pt_regs *regs)
343 csky_insn_reg_get_val(regs, tmp, &val);
346 instruction_pointer_set(regs,
349 instruction_pointer_set(regs, addr + 4);
353 simulate_bsr32(u32 opcode, long addr, struct pt_regs *regs)
360 instruction_pointer_set(regs,
363 regs->lr = addr + 4;
367 simulate_jmpi32(u32 opcode, long addr, struct pt_regs *regs)
373 ((instruction_pointer(regs) + offset) & 0xfffffffc);
375 instruction_pointer_set(regs, val);
379 simulate_jsri32(u32 opcode, long addr, struct pt_regs *regs)
385 ((instruction_pointer(regs) + offset) & 0xfffffffc);
387 regs->lr = addr + 4;
389 instruction_pointer_set(regs, val);