Lines Matching refs:res1
178 v |= masks->mask[sr].res1;
184 static void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)
189 kvm->arch.sysreg_masks->mask[i].res1 = res1;
194 u64 res0, res1;
214 res0 = res1 = 0;
219 set_sysreg_masks(kvm, VTTBR_EL2, res0, res1);
223 res1 = BIT(31);
224 set_sysreg_masks(kvm, VTCR_EL2, res0, res1);
228 res1 = BIT(31);
229 set_sysreg_masks(kvm, VMPIDR_EL2, res0, res1);
233 res1 = HCR_RW;
265 res1 |= HCR_E2H;
266 set_sysreg_masks(kvm, HCR_EL2, res0, res1);
270 res1 = HCRX_EL2_RES1;
308 set_sysreg_masks(kvm, HCRX_EL2, res0, res1);
311 res0 = res1 = 0;
348 set_sysreg_masks(kvm, HFGRTR_EL2, res0 | __HFGRTR_EL2_RES0, res1);
349 set_sysreg_masks(kvm, HFGWTR_EL2, res0 | __HFGWTR_EL2_RES0, res1);
352 res0 = res1 = 0;
387 set_sysreg_masks(kvm, HDFGRTR_EL2, res0 | HDFGRTR_EL2_RES0, res1);
396 set_sysreg_masks(kvm, HFGWTR_EL2, res0 | HDFGWTR_EL2_RES0, res1);
400 res1 = HFGITR_EL2_RES1;
430 set_sysreg_masks(kvm, HFGITR_EL2, res0, res1);
434 res1 = HAFGRTR_EL2_RES1;
436 res0 |= ~(res0 | res1);
437 set_sysreg_masks(kvm, HAFGRTR_EL2, res0, res1);