Lines Matching defs:esr
14 #include <asm/esr.h>
31 static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u64 esr)
33 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
116 u64 esr = kvm_vcpu_get_esr(vcpu);
118 if (esr & ESR_ELx_WFx_ISS_WFE) {
126 if (esr & ESR_ELx_WFx_ISS_WFxT) {
127 if (esr & ESR_ELx_WFx_ISS_RV) {
137 esr &= ~ESR_ELx_WFx_ISS_WFxT;
141 if (esr & ESR_ELx_WFx_ISS_WFE) {
144 if (esr & ESR_ELx_WFx_ISS_WFxT)
169 u64 esr = kvm_vcpu_get_esr(vcpu);
172 run->debug.arch.hsr = lower_32_bits(esr);
173 run->debug.arch.hsr_high = upper_32_bits(esr);
176 switch (ESR_ELx_EC(esr)) {
190 u64 esr = kvm_vcpu_get_esr(vcpu);
192 kvm_pr_unimpl("Unknown exception class: esr: %#016llx -- %s\n",
193 esr, esr_get_class_string(esr));
285 u64 esr = kvm_vcpu_get_esr(vcpu);
286 u8 esr_ec = ESR_ELx_EC(esr);
386 void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,
397 } else if (ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &&
398 (esr & ESR_ELx_BRK64_ISS_COMMENT_MASK) == BUG_BRK_IMM) {
433 spsr, elr_virt, esr, far, hpfar, par, vcpu);