Lines Matching defs:bit
422 * Bit assignment for the trap controls. We use a 64bit word with the
427 * [19:14] bit number in the FGT register (6 bits)
428 * [20] trap polarity (1 bit)
444 unsigned long bit:6; /* Bit number */
1026 .bit = g ## _EL2_ ## b ## _SHIFT, \
1600 * The trap bits capture *64* debug registers per bit, but the
1672 * overlap in their bit assignment, there are a number of bits
1673 * that are RES0 on one side, and an actual trap bit on the
1787 kvm_err("CGT[%d] has MBZ bit set\n", i);
1960 return (val & BIT(tc.bit));
1964 * we need to evaluate the bit in the light of the feature
1967 * So let's check if the bit has been earmarked as RES0, as
1970 if (val & BIT(tc.bit))
1995 return !(kvm_get_sysreg_res0(kvm, sr) & BIT(tc.bit));
2026 (vcpu->kvm->arch.fgu[tc.fgt] & BIT(tc.bit))) {
2148 * - trying to return to a 32bit EL
2179 * HCR_EL2.NV bit is set and this is coming from !EL2.
2213 * since we set HCR_EL2.NV bit only when entering the virtual EL2.