Lines Matching refs:r1
49 ldr r1, __cache_params
59 stmia r1, {r2, r3}
61 mov r1, #1 @ disable quirky VFP
62 str_l r1, VFP_arch_feroceon, r2
153 ldr r1, __cache_params
154 ldmia r1, {r1, r3}
155 1: orr ip, r1, r3
159 subs r1, r1, #(1 << 5) @ next set
181 sub r3, r1, r0 @ calculate total size
191 cmp r0, r1
231 cmp r0, r1
249 add r1, r0, r1
252 cmp r0, r1
263 add r1, r0, #PAGE_SZ - CACHE_DLINESIZE @ top addr is inclusive
267 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
293 tst r1, #CACHE_DLINESIZE - 1
294 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
297 cmp r0, r1
307 tst r1, #CACHE_DLINESIZE - 1
308 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
309 cmp r1, r0
310 subne r1, r1, #1 @ top address is inclusive
314 mcr p15, 5, r1, c15, c14, 1 @ D inv range top
333 cmp r0, r1
341 cmp r1, r0
342 subne r1, r1, #1 @ top address is inclusive
346 mcr p15, 5, r1, c15, c13, 1 @ D clean range top
364 cmp r0, r1
373 cmp r1, r0
374 subne r1, r1, #1 @ top address is inclusive
378 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
391 add r1, r1, r0
405 add r1, r1, r0
427 mov r3, r1
431 subs r1, r1, #CACHE_DLINESIZE
517 mcr p15, 0, r1, c2, c0, 0 @ TTB address