arm/mm/proc-arm946.S

46 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
57 	mcr	p15, 0, ip, c7, c5, 0		@ flush I cache
58 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
59 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
63 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
73 	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
83 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
103 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
107 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index
137 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
140 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
144 	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
147 	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
183 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
184 	mcr	p15, 0, r0, c7, c5, 1		@ invalidate I entry
188 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
204 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
209 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
210 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
233 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
237 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
253 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
258 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
275 	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
277 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
282 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
317 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
322 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
328 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
329 	mcr	p15, 0, r0, c7, c6, 0		@ invalidate D cache
330 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
332 	mcr	p15, 0, r0, c6, c3, 0		@ disable memory region 3~7
333 	mcr	p15, 0, r0, c6, c4, 0
334 	mcr	p15, 0, r0, c6, c5, 0
335 	mcr	p15, 0, r0, c6, c6, 0
336 	mcr	p15, 0, r0, c6, c7, 0
339 	mcr	p15, 0, r0, c6,	c0, 0		@ set region 0, default
344 	mcr	p15, 0, r3, c6, c1, 0
349 	mcr	p15, 0, r3, c6, c2, 0
352 	mcr	p15, 0, r0, c2, c0, 0		@ region 1,2 d-cacheable
353 	mcr	p15, 0, r0, c2, c0, 1		@ region 1,2 i-cacheable
359 	mcr	p15, 0, r0, c3, c0, 0
372 	mcr	p15, 0, r0, c5, c0, 2		@ set data access permission
373 	mcr	p15, 0, r0, c5, c0, 3		@ set inst. access permission