Lines Matching refs:tmp
31 .macro v7m_cacheop, rt, tmp, op, c = al
32 movw\c \tmp, #:lower16:BASEADDR_V7M_SCB + \op
33 movt\c \tmp, #:upper16:BASEADDR_V7M_SCB + \op
34 str\c \rt, [\tmp]
46 .macro write_csselr, rt, tmp
47 v7m_cacheop \rt, \tmp, V7M_SCB_CSSELR
53 .macro dcisw, rt, tmp
54 v7m_cacheop \rt, \tmp, V7M_SCB_DCISW
60 .macro dccisw, rt, tmp
61 v7m_cacheop \rt, \tmp, V7M_SCB_DCCISW
68 .macro dccimvac\c, rt, tmp
69 v7m_cacheop \rt, \tmp, V7M_SCB_DCCIMVAC, \c
77 .macro dcimvac\c, rt, tmp
78 v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC, \c
85 .macro dccmvau, rt, tmp
86 v7m_cacheop \rt, \tmp, V7M_SCB_DCCMVAU
92 .macro dccmvac, rt, tmp
93 v7m_cacheop \rt, \tmp, V7M_SCB_DCCMVAC
99 .macro icimvau, rt, tmp
100 v7m_cacheop \rt, \tmp, V7M_SCB_ICIMVAU