Lines Matching refs:r2
51 mov r2, #1
53 movs r1, r2, lsl r1 @ #1 shifted left by same amount
56 and r2, r0, #0x7
57 add r2, r2, #4 @ SetShift
62 2: mov ip, r0, lsl r2 @ NumSet << SetShift
107 ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register
111 teq r1, r2, lsr #4 @ test for errata affected core and if so...
136 add r2, r10, r10, lsr #1 @ work out 3x current cache level
137 mov r1, r0, lsr r2 @ extract cache type bits from clidr
150 and r2, r1, #7 @ extract the length of the cache lines
151 add r2, r2, #4 @ add 4 (line length offset)
163 mov r5, r9, lsl r2 @ factor set number into r5
284 dcache_line_size r2, r3
285 sub r3, r2, #1
293 add r12, r12, r2
299 ldr r2, [r3, #0]
301 icache_line_size r2, r3
303 sub r3, r2, #1
307 add r12, r12, r2
340 dcache_line_size r2, r3
342 sub r3, r2, #1
350 add r0, r0, r2
368 dcache_line_size r2, r3
369 sub r3, r2, #1
377 addne r0, r0, r2
385 addlo r0, r0, r2
398 dcache_line_size r2, r3
399 sub r3, r2, #1
407 add r0, r0, r2
420 dcache_line_size r2, r3
421 sub r3, r2, #1
429 add r0, r0, r2
444 teq r2, #DMA_FROM_DEVICE
457 teq r2, #DMA_TO_DEVICE