arm/mm/cache-v7.S

87 	ALT_UP(mcr	p15, 0, r0, c7, c5, 0)		@ I+BTB cache invalidate
103 ALT_UP(	mov	r3, r0, lsr #26)		@ move LoUU into position
108 ALT_UP(	ret	lr)				@ LoUU is zero, so nothing to do
202 	ALT_UP(mcr	p15, 0, r0, c7, c5, 0)	@ I+BTB cache invalidate
218 	ALT_UP(mcr	p15, 0, r0, c7, c5, 0)	@ I+BTB cache invalidate
289 	ALT_UP(W(nop))
312 	ALT_UP(mcr	p15, 0, r0, c7, c5, 6)	@ invalidate BTB
346 	ALT_UP(W(nop))
374 	ALT_UP(W(nop))
403 	ALT_UP(W(nop))
425 	ALT_UP(W(nop))