arm/mach-versatile/dcscb.c

39 static int dcscb_cpu_powerup(unsigned int cpu, unsigned int cluster)
43 	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
44 	if (cluster >= 2 || !(cpumask & dcscb_allcpus_mask[cluster]))
47 	rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
49 	writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
53 static int dcscb_cluster_powerup(unsigned int cluster)
57 	pr_debug("%s: cluster %u\n", __func__, cluster);
58 	if (cluster >= 2)
61 	/* remove cluster reset and add individual CPU's reset */
62 	rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
64 	rst_hold |= dcscb_allcpus_mask[cluster];
65 	writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
69 static void dcscb_cpu_powerdown_prepare(unsigned int cpu, unsigned int cluster)
73 	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
74 	BUG_ON(cluster >= 2 || !((1 << cpu) & dcscb_allcpus_mask[cluster]));
76 	rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
78 	writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
81 static void dcscb_cluster_powerdown_prepare(unsigned int cluster)
85 	pr_debug("%s: cluster %u\n", __func__, cluster);
86 	BUG_ON(cluster >= 2);
88 	rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
90 	writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
101 	/* Flush all cache levels for this cluster. */
108 	 * cluster standing" would need to be implemented if the
117 	 * Disable cluster-level coherency by masking
166 	 * through the cluster entry vectors.