Lines Matching refs:voltdm
62 * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG
102 * @voltdm: pointer to voltagdomain defining the desired VC channel
116 static int omap_vc_config_channel(struct voltagedomain *voltdm)
118 struct omap_vc_channel *vc = voltdm->vc;
127 voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
135 int omap_vc_pre_scale(struct voltagedomain *voltdm,
139 struct omap_vc_channel *vc = voltdm->vc;
143 if (!voltdm->pmic) {
145 __func__, voltdm->name);
149 if (!voltdm->pmic->uv_to_vsel) {
151 __func__, voltdm->name);
155 if (!voltdm->read || !voltdm->write) {
157 __func__, voltdm->name);
161 *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
162 *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt);
165 vc_cmdval = voltdm->read(vc->cmdval_reg);
168 voltdm->write(vc_cmdval, vc->cmdval_reg);
170 voltdm->vc_param->on = target_volt;
172 omap_vp_update_errorgain(voltdm, target_volt);
177 void omap_vc_post_scale(struct voltagedomain *voltdm,
185 smps_delay = ((smps_steps * voltdm->pmic->step_size) /
186 voltdm->pmic->slew_rate) + 2;
191 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
194 struct omap_vc_channel *vc = voltdm->vc;
200 ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
210 voltdm->write(vc_bypass_value, vc_bypass_val_reg);
211 voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
213 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
232 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
235 omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
330 static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
337 vc.vd = voltdm;
339 val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET);
346 voltdm->write(val, OMAP3_PRM_POLCTRL_OFFSET);
360 val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
365 voltdm->write(val, OMAP3_PRM_VOLTCTRL_OFFSET);
372 static void omap3_init_voltsetup1(struct voltagedomain *voltdm,
377 val = (voltdm->vc_param->on - idle) / voltdm->pmic->slew_rate;
378 val *= voltdm->sys_clk.rate / 8 / 1000000 + 1;
379 val <<= __ffs(voltdm->vfsm->voltsetup_mask);
380 c->voltsetup1 &= ~voltdm->vfsm->voltsetup_mask;
386 * @voltdm: channel to configure
400 static void omap3_set_i2c_timings(struct voltagedomain *voltdm)
405 omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->off);
408 omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->ret);
413 * @voltdm: channel to configure
426 static void omap3_set_off_timings(struct voltagedomain *voltdm)
451 voltdm->write(clksetup, OMAP3_PRM_CLKSETUP_OFFSET);
452 voltdm->write(voltoffset, OMAP3_PRM_VOLTOFFSET_OFFSET);
455 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
457 omap3_vc_init_pmic_signaling(voltdm);
458 omap3_set_off_timings(voltdm);
459 omap3_set_i2c_timings(voltdm);
464 * @voltdm: channel to calculate values for
472 static u32 omap4_calc_volt_ramp(struct voltagedomain *voltdm, u32 voltage_diff)
478 time = voltage_diff / voltdm->pmic->slew_rate;
480 cycles = voltdm->sys_clk.rate / 1000 * time / 1000;
508 voltdm->name);
544 * @voltdm: channel to configure
549 static void omap4_set_timings(struct voltagedomain *voltdm, bool off_mode)
557 ramp = omap4_calc_volt_ramp(voltdm,
558 voltdm->vc_param->on - voltdm->vc_param->off);
559 offset = voltdm->vfsm->voltsetup_off_reg;
561 ramp = omap4_calc_volt_ramp(voltdm,
562 voltdm->vc_param->on - voltdm->vc_param->ret);
563 offset = voltdm->vfsm->voltsetup_reg;
569 val = voltdm->read(offset);
575 voltdm->write(val, offset);
587 static void __init omap4_vc_init_pmic_signaling(struct voltagedomain *voltdm)
592 vc.vd = voltdm;
593 voltdm->write(OMAP4_VDD_DEFAULT_VAL, OMAP4_PRM_VOLTCTRL_OFFSET);
597 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
599 omap4_vc_init_pmic_signaling(voltdm);
600 omap4_set_timings(voltdm, true);
601 omap4_set_timings(voltdm, false);
655 * @voltdm: voltagedomain pointer to get data from
662 static void __init omap4_vc_i2c_timing_init(struct voltagedomain *voltdm)
669 if (!voltdm->pmic->i2c_high_speed) {
681 capacitance += voltdm->pmic->i2c_pad_load;
690 switch (voltdm->sys_clk.rate) {
708 voltdm->sys_clk.rate);
724 voltdm->write(val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
731 * @voltdm: voltage domain containing VC data
742 static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
744 struct omap_vc_channel *vc = voltdm->vc;
750 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
752 __func__, voltdm->name, i2c_high_speed);
763 i2c_high_speed = voltdm->pmic->i2c_high_speed;
765 voltdm->rmw(vc->common->i2c_cfg_clear_mask,
769 mcode = voltdm->pmic->i2c_mcode;
771 voltdm->rmw(vc->common->i2c_mcode_mask,
776 omap4_vc_i2c_timing_init(voltdm);
783 * @voltdm: channel to calculate value for
791 static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt)
793 if (voltdm->pmic->vddmin > uvolt)
794 uvolt = voltdm->pmic->vddmin;
795 if (voltdm->pmic->vddmax < uvolt) {
797 __func__, uvolt, voltdm->pmic->vddmax);
799 uvolt = voltdm->pmic->vddmax;
802 return voltdm->pmic->uv_to_vsel(uvolt);
805 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
807 struct omap_vc_channel *vc = voltdm->vc;
811 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
812 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
816 if (!voltdm->read || !voltdm->write) {
818 __func__, voltdm->name);
829 vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
830 vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
831 vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
834 voltdm->rmw(vc->smps_sa_mask,
842 voltdm->rmw(vc->smps_volra_mask,
848 voltdm->rmw(vc->smps_cmdra_mask,
858 on_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->on);
859 onlp_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->onlp);
860 ret_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->ret);
861 off_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->off);
867 voltdm->write(val, vc->cmdval_reg);
871 omap_vc_config_channel(voltdm);
873 omap_vc_i2c_init(voltdm);
876 omap3_vc_init_channel(voltdm);
878 omap4_vc_init_channel(voltdm);