Lines Matching refs:role
409 * UART4 is extremely unclear and opaque; it is unclear what the role
415 { .role = "softreset_uart1_fck", .clk = "uart1_fck" },
446 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
447 { .role = "tv_clk", .clk = "dss_tv_fck" },
449 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
541 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
559 { .role = "ick", .clk = "dss_ick" },
578 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
663 { .role = "dbclk", .clk = "gpio1_dbck", },
684 { .role = "dbclk", .clk = "gpio2_dbck", },
705 { .role = "dbclk", .clk = "gpio3_dbck", },
726 { .role = "dbclk", .clk = "gpio4_dbck", },
748 { .role = "dbclk", .clk = "gpio5_dbck", },
770 { .role = "dbclk", .clk = "gpio6_dbck", },
810 { .role = "pad_fck", .clk = "mcbsp_clks" },
811 { .role = "prcm_fck", .clk = "core_96m_fck" },
815 { .role = "pad_fck", .clk = "mcbsp_clks" },
816 { .role = "prcm_fck", .clk = "per_96m_fck" },
1159 { .role = "dbck", .clk = "omap_32k_fck", },
1209 { .role = "dbck", .clk = "omap_32k_fck", },
1253 { .role = "dbck", .clk = "omap_32k_fck", },