Lines Matching refs:name
165 .name = "l4sec_clkdm",
166 .pwrdm = { .name = "core_pwrdm" },
177 .name = "iva_clkdm",
178 .pwrdm = { .name = "iva_pwrdm" },
189 .name = "mipiext_clkdm",
190 .pwrdm = { .name = "core_pwrdm" },
200 .name = "l3main2_clkdm",
201 .pwrdm = { .name = "core_pwrdm" },
210 .name = "l3main1_clkdm",
211 .pwrdm = { .name = "core_pwrdm" },
220 .name = "custefuse_clkdm",
221 .pwrdm = { .name = "custefuse_pwrdm" },
229 .name = "ipu_clkdm",
230 .pwrdm = { .name = "core_pwrdm" },
241 .name = "l4cfg_clkdm",
242 .pwrdm = { .name = "core_pwrdm" },
251 .name = "abe_clkdm",
252 .pwrdm = { .name = "abe_pwrdm" },
261 .name = "dss_clkdm",
262 .pwrdm = { .name = "dss_pwrdm" },
273 .name = "dsp_clkdm",
274 .pwrdm = { .name = "dsp_pwrdm" },
285 .name = "c2c_clkdm",
286 .pwrdm = { .name = "core_pwrdm" },
296 .name = "l4per_clkdm",
297 .pwrdm = { .name = "core_pwrdm" },
306 .name = "gpu_clkdm",
307 .pwrdm = { .name = "gpu_pwrdm" },
318 .name = "wkupaon_clkdm",
319 .pwrdm = { .name = "wkupaon_pwrdm" },
328 .name = "mpu0_clkdm",
329 .pwrdm = { .name = "cpu0_pwrdm" },
337 .name = "mpu1_clkdm",
338 .pwrdm = { .name = "cpu1_pwrdm" },
346 .name = "coreaon_clkdm",
347 .pwrdm = { .name = "coreaon_pwrdm" },
355 .name = "mpu_clkdm",
356 .pwrdm = { .name = "mpu_pwrdm" },
366 .name = "l3init_clkdm",
367 .pwrdm = { .name = "l3init_pwrdm" },
378 .name = "dma_clkdm",
379 .pwrdm = { .name = "core_pwrdm" },
389 .name = "l3instr_clkdm",
390 .pwrdm = { .name = "core_pwrdm" },
397 .name = "emif_clkdm",
398 .pwrdm = { .name = "core_pwrdm" },
407 .name = "emu_clkdm",
408 .pwrdm = { .name = "emu_pwrdm" },
416 .name = "cam_clkdm",
417 .pwrdm = { .name = "cam_pwrdm" },