arm/mach-ep93xx/clock.c

76 	struct clk_psc *psc = to_clk_psc(hw);
77 	u32 val = readl(psc->reg);
79 	return (val & BIT(psc->bit_idx)) ? 1 : 0;
84 	struct clk_psc *psc = to_clk_psc(hw);
88 	if (psc->lock)
89 		spin_lock_irqsave(psc->lock, flags);
91 	val = __raw_readl(psc->reg);
92 	val |= BIT(psc->bit_idx);
94 	ep93xx_syscon_swlocked_write(val, psc->reg);
96 	if (psc->lock)
97 		spin_unlock_irqrestore(psc->lock, flags);
104 	struct clk_psc *psc = to_clk_psc(hw);
108 	if (psc->lock)
109 		spin_lock_irqsave(psc->lock, flags);
111 	val = __raw_readl(psc->reg);
112 	val &= ~BIT(psc->bit_idx);
114 	ep93xx_syscon_swlocked_write(val, psc->reg);
116 	if (psc->lock)
117 		spin_unlock_irqrestore(psc->lock, flags);
132 	struct clk_psc *psc;
135 	psc = kzalloc(sizeof(*psc), GFP_KERNEL);
136 	if (!psc)
145 	psc->reg = reg;
146 	psc->bit_idx = bit_idx;
147 	psc->hw.init = &init;
148 	psc->lock = &clk_lock;
150 	clk = clk_register(NULL, &psc->hw);
152 		kfree(psc);
156 	return &psc->hw;
161 	struct clk_psc *psc = to_clk_psc(hw);
162 	u32 val = __raw_readl(psc->reg);
175 	struct clk_psc *psc = to_clk_psc(hw);
182 	if (psc->lock)
183 		spin_lock_irqsave(psc->lock, flags);
185 	val = __raw_readl(psc->reg);
194 	ep93xx_syscon_swlocked_write(val, psc->reg);
196 	if (psc->lock)
197 		spin_unlock_irqrestore(psc->lock, flags);
262 	struct clk_psc *psc = to_clk_psc(hw);
264 	u32 val = __raw_readl(psc->reg);
277 	struct clk_psc *psc = to_clk_psc(hw);
301 	val = __raw_readl(psc->reg);
308 	ep93xx_syscon_swlocked_write(val, psc->reg);
329 	struct clk_psc *psc;
332 	psc = kzalloc(sizeof(*psc), GFP_KERNEL);
333 	if (!psc)
342 	psc->reg = reg;
343 	psc->bit_idx = bit_idx;
344 	psc->lock = &clk_lock;
345 	psc->hw.init = &init;
347 	clk = clk_register(NULL, &psc->hw);
349 		kfree(psc);
352 	return &psc->hw;
358 	struct clk_psc *psc = to_clk_psc(hw);
359 	u32 val = __raw_readl(psc->reg);
360 	u8 index = (val & psc->mask) >> psc->shift;
362 	if (index > psc->num_div)
365 	return DIV_ROUND_UP_ULL(parent_rate, psc->div[index]);
371 	struct clk_psc *psc = to_clk_psc(hw);
375 	maxdiv = psc->div[psc->num_div - 1];
377 	for (i = 0; i < psc->num_div; i++) {
378 		if ((rate * psc->div[i]) == *parent_rate)
379 			return DIV_ROUND_UP_ULL((u64)*parent_rate, psc->div[i]);
381 		now = DIV_ROUND_UP_ULL((u64)*parent_rate, psc->div[i]);
396 	struct clk_psc *psc = to_clk_psc(hw);
397 	u32 val = __raw_readl(psc->reg) & ~psc->mask;
400 	for (i = 0; i < psc->num_div; i++)
401 		if (rate == parent_rate / psc->div[i]) {
402 			val |= i << psc->shift;
406 	if (i == psc->num_div)
409 	ep93xx_syscon_swlocked_write(val, psc->reg);
433 	struct clk_psc *psc;
436 	psc = kzalloc(sizeof(*psc), GFP_KERNEL);
437 	if (!psc)
446 	psc->reg = reg;
447 	psc->bit_idx = enable_bit;
448 	psc->mask = GENMASK(shift + width - 1, shift);
449 	psc->shift = shift;
450 	psc->div = clk_divisors;
451 	psc->num_div = num_div;
452 	psc->lock = &clk_lock;
453 	psc->hw.init = &init;
455 	clk = clk_register(NULL, &psc->hw);
457 		kfree(psc);
460 	return &psc->hw;