include/debug/brcmstb.S

37 #define checkuart(rp, rv, family_id, family) \
41 		cmp	rp, rv ; \
47 		.macro  addruart, rp, rv, tmp
49 		ldr	\rv, [\rp]		@ linked addr is stored there
50 		sub	\rv, \rv, \rp		@ offset between the two
52 		sub	\tmp, \rp, \rv		@ actual brcmstb_uart_config
56 		mov	\rv, #0			@ yes; record init is done
57 		str	\rv, [\tmp]
60 		mrc	p15, 0, \rv, c0, c0, 0	@ get Main ID register
62 		and	\rv, \rv, \rp
64 		cmp	\rv, \rp
68 		mrc	p15, 1, \rv, c15, c3, 0	@ get PERIPHBASE from CBAR
69 		ands	\rv, \rv, #REG_PHYS_BASE
74 		ldr	\rv, [\rp, #0]		@ get register contents
75 ARM_BE8(	rev	\rv, \rv )
76 		and	\rv, \rv, #0xffffff00	@ strip revision bits [7:0]
79 20:		checkuart(\rp, \rv, 0x33900000, 3390)
80 21:		checkuart(\rp, \rv, 0x07211600, 72116)
81 22:		checkuart(\rp, \rv, 0x72160000, 7216)
82 23:		checkuart(\rp, \rv, 0x07216400, 72164)
83 24:		checkuart(\rp, \rv, 0x07216500, 72165)
84 25:		checkuart(\rp, \rv, 0x72500000, 7250)
85 26:		checkuart(\rp, \rv, 0x72550000, 7255)
86 27:		checkuart(\rp, \rv, 0x72600000, 7260)
87 28:		checkuart(\rp, \rv, 0x72680000, 7268)
88 29:		checkuart(\rp, \rv, 0x72710000, 7271)
89 30:		checkuart(\rp, \rv, 0x72780000, 7278)
90 31:		checkuart(\rp, \rv, 0x73640000, 7364)
91 32:		checkuart(\rp, \rv, 0x73660000, 7366)
92 33:		checkuart(\rp, \rv, 0x07416500, 74165)
93 34:		checkuart(\rp, \rv, 0x07437100, 74371)
94 35:		checkuart(\rp, \rv, 0x74390000, 7439)
95 36:		checkuart(\rp, \rv, 0x74450000, 7445)
107 92:		and     \rv, \rp, #0xffffff	@ offset within 16MB section
108 		add	\rv, \rv, #REG_VIRT_BASE
109 		str	\rv, [\tmp, #8]		@ Store in brcmstb_uart_virt
119 		ldr	\rv, [\tmp, #8]		@ Load brcmstb_uart_virt