platform/amiga_m68k/rom_calls.h

243 #define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
247    t3 _##name##_v3 = (v3);					\
256       register t3 _n3 __asm(#r3) = _##name##_v3;		\
265 #define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
269    t3 _##name##_v3 = (v3);					\
278       register t3 _n3 __asm(#r3) = _##name##_v3;		\
287 #define LP3UB(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \
291    t3 _##name##_v3 = (v3);					\
299       register t3 _n3 __asm(#r3) = _##name##_v3;		\
309 #define LP3NRUB(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3)	\
313    t3 _##name##_v3 = (v3);					\
321       register t3 _n3 __asm(#r3) = _##name##_v3;		\
330 #define LP3FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
335    t3 _##name##_v3 = (v3);					\
344       register t3 _n3 __asm(#r3) = _##name##_v3;		\
354 #define LP3NRFP(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
359    t3 _##name##_v3 = (v3);					\
368       register t3 _n3 __asm(#r3) = _##name##_v3;		\
376 #define LP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
380    t3 _##name##_v3 = (v3);					\
390       register t3 _n3 __asm(#r3) = _##name##_v3;		\
400 #define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
404    t3 _##name##_v3 = (v3);					\
414       register t3 _n3 __asm(#r3) = _##name##_v3;		\
424 #define LP4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt) \
429    t3 _##name##_v3 = (v3);					\
439       register t3 _n3 __asm(#r3) = _##name##_v3;		\
449 #define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
453    t3 _##name##_v3 = (v3);					\
464       register t3 _n3 __asm(#r3) = _##name##_v3;		\
475 #define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
479    t3 _##name##_v3 = (v3);					\
490       register t3 _n3 __asm(#r3) = _##name##_v3;		\
501 #define LP5FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \
506    t3 _##name##_v3 = (v3);					\
517       register t3 _n3 __asm(#r3) = _##name##_v3;		\
529 #define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
533    t3 _##name##_v3 = (v3);					\
544       register t3 _n3 __asm(#r3) = _##name##_v3;		\
555 #define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
559    t3 _##name##_v3 = (v3);					\
571       register t3 _n3 __asm(#r3) = _##name##_v3;		\
583 #define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
587    t3 _##name##_v3 = (v3);					\
599       register t3 _n3 __asm(#r3) = _##name##_v3;		\
610 #define LP7(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
614    t3 _##name##_v3 = (v3);					\
627       register t3 _n3 __asm(#r3) = _##name##_v3;		\
640 #define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
644    t3 _##name##_v3 = (v3);					\
657       register t3 _n3 __asm(#r3) = _##name##_v3;		\
670 #define LP7A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
674    t3 _##name##_v3 = (v3);					\
687       register t3 _n3 __asm(#r3) = _##name##_v3;		\
704 #define LP8(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
708    t3 _##name##_v3 = (v3);					\
722       register t3 _n3 __asm(#r3) = _##name##_v3;		\
737 #define LP8NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
741    t3 _##name##_v3 = (v3);					\
755       register t3 _n3 __asm(#r3) = _##name##_v3;		\
769 #define LP9(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
773    t3 _##name##_v3 = (v3);					\
788       register t3 _n3 __asm(#r3) = _##name##_v3;		\
804 #define LP9NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
808    t3 _##name##_v3 = (v3);					\
823       register t3 _n3 __asm(#r3) = _##name##_v3;		\
838 #define LP10(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
842    t3 _##name##_v3 = (v3);					\
858       register t3 _n3 __asm(#r3) = _##name##_v3;		\
875 #define LP10NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
879    t3 _##name##_v3 = (v3);					\
895       register t3 _n3 __asm(#r3) = _##name##_v3;		\
911 #define LP11(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, t11, v11, r11, bt, bn) \
915    t3 _##name##_v3 = (v3);					\
932       register t3 _n3 __asm(#r3) = _##name##_v3;		\