Lines Matching refs:name
39 #define LP0(offs, rt, name, bt, bn) \
45 register rt _##name##_re __asm("d0"); \
46 void *const _##name##_bn = (bn); \
48 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
49 : [libbase] "a" (_##name##_bn) \
51 _##name##_re; \
55 #define LP0NR(offs, name, bt, bn) \
62 void *const _##name##_bn = (bn); \
65 : [libbase] "a" (_##name##_bn) \
70 #define LP1(offs, rt, name, t1, v1, r1, bt, bn) \
72 t1 _##name##_v1 = (v1); \
77 register rt _##name##_re __asm("d0"); \
78 void *const _##name##_bn = (bn); \
79 register t1 _n1 __asm(#r1) = _##name##_v1; \
81 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
82 : [libbase] "a" (_##name##_bn), "rf"(_n1) \
84 _##name##_re; \
88 #define LP1NR(offs, name, t1, v1, r1, bt, bn) \
90 t1 _##name##_v1 = (v1); \
96 void *const _##name##_bn = (bn); \
97 register t1 _n1 __asm(#r1) = _##name##_v1; \
100 : [libbase] "a" (_##name##_bn), "rf"(_n1) \
106 #define LP1A5(offs, rt, name, t1, v1, r1, bt, bn) \
108 t1 _##name##_v1 = (v1); \
113 register rt _##name##_re __asm("d0"); \
114 void *const _##name##_bn = (bn); \
115 register t1 _n1 __asm(#r1) = _##name##_v1; \
117 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
118 : [libbase] "a" (_##name##_bn), "rf"(_n1) \
120 _##name##_re; \
125 #define LP1NRA5(offs, name, t1, v1, r1, bt, bn) \
127 t1 _##name##_v1 = (v1); \
133 void *const _##name##_bn = (bn); \
134 register t1 _n1 __asm(#r1) = _##name##_v1; \
137 : [libbase] "a" (_##name##_bn), "rf"(_n1) \
143 #define LP1A5FP(offs, rt, name, t1, v1, r1, bt, bn, fpt) \
146 t1 _##name##_v1 = (v1); \
151 register rt _##name##_re __asm("d0"); \
152 void *const _##name##_bn = (bn); \
153 register t1 _n1 __asm(#r1) = _##name##_v1; \
155 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
156 : [libbase] "a" (_##name##_bn), "rf"(_n1) \
158 _##name##_re; \
162 #define LP2(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn) \
164 t1 _##name##_v1 = (v1); \
165 t2 _##name##_v2 = (v2); \
170 register rt _##name##_re __asm("d0"); \
171 void *const _##name##_bn = (bn); \
172 register t1 _n1 __asm(#r1) = _##name##_v1; \
173 register t2 _n2 __asm(#r2) = _##name##_v2; \
175 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
176 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
178 _##name##_re; \
182 #define LP2NR(offs, name, t1, v1, r1, t2, v2, r2, bt, bn) \
184 t1 _##name##_v1 = (v1); \
185 t2 _##name##_v2 = (v2); \
191 void *const _##name##_bn = (bn); \
192 register t1 _n1 __asm(#r1) = _##name##_v1; \
193 register t2 _n2 __asm(#r2) = _##name##_v2; \
196 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
202 #define LP2UB(offs, rt, name, t1, v1, r1, t2, v2, r2) \
204 t1 _##name##_v1 = (v1); \
205 t2 _##name##_v2 = (v2); \
210 register rt _##name##_re __asm("d0"); \
211 register t1 _n1 __asm(#r1) = _##name##_v1; \
212 register t2 _n2 __asm(#r2) = _##name##_v2; \
214 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
217 _##name##_re; \
222 #define LP2FP(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt) \
225 t1 _##name##_v1 = (v1); \
226 t2 _##name##_v2 = (v2); \
231 register rt _##name##_re __asm("d0"); \
232 void *const _##name##_bn = (bn); \
233 register t1 _n1 __asm(#r1) = _##name##_v1; \
234 register t2 _n2 __asm(#r2) = _##name##_v2; \
236 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
237 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
239 _##name##_re; \
243 #define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
245 t1 _##name##_v1 = (v1); \
246 t2 _##name##_v2 = (v2); \
247 t3 _##name##_v3 = (v3); \
252 register rt _##name##_re __asm("d0"); \
253 void *const _##name##_bn = (bn); \
254 register t1 _n1 __asm(#r1) = _##name##_v1; \
255 register t2 _n2 __asm(#r2) = _##name##_v2; \
256 register t3 _n3 __asm(#r3) = _##name##_v3; \
258 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
259 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
261 _##name##_re; \
265 #define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
267 t1 _##name##_v1 = (v1); \
268 t2 _##name##_v2 = (v2); \
269 t3 _##name##_v3 = (v3); \
275 void *const _##name##_bn = (bn); \
276 register t1 _n1 __asm(#r1) = _##name##_v1; \
277 register t2 _n2 __asm(#r2) = _##name##_v2; \
278 register t3 _n3 __asm(#r3) = _##name##_v3; \
281 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
287 #define LP3UB(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \
289 t1 _##name##_v1 = (v1); \
290 t2 _##name##_v2 = (v2); \
291 t3 _##name##_v3 = (v3); \
296 register rt _##name##_re __asm("d0"); \
297 register t1 _n1 __asm(#r1) = _##name##_v1; \
298 register t2 _n2 __asm(#r2) = _##name##_v2; \
299 register t3 _n3 __asm(#r3) = _##name##_v3; \
301 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
304 _##name##_re; \
309 #define LP3NRUB(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \
311 t1 _##name##_v1 = (v1); \
312 t2 _##name##_v2 = (v2); \
313 t3 _##name##_v3 = (v3); \
319 register t1 _n1 __asm(#r1) = _##name##_v1; \
320 register t2 _n2 __asm(#r2) = _##name##_v2; \
321 register t3 _n3 __asm(#r3) = _##name##_v3; \
330 #define LP3FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
333 t1 _##name##_v1 = (v1); \
334 t2 _##name##_v2 = (v2); \
335 t3 _##name##_v3 = (v3); \
340 register rt _##name##_re __asm("d0"); \
341 void *const _##name##_bn = (bn); \
342 register t1 _n1 __asm(#r1) = _##name##_v1; \
343 register t2 _n2 __asm(#r2) = _##name##_v2; \
344 register t3 _n3 __asm(#r3) = _##name##_v3; \
346 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
347 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
349 _##name##_re; \
354 #define LP3NRFP(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
357 t1 _##name##_v1 = (v1); \
358 t2 _##name##_v2 = (v2); \
359 t3 _##name##_v3 = (v3); \
365 void *const _##name##_bn = (bn); \
366 register t1 _n1 __asm(#r1) = _##name##_v1; \
367 register t2 _n2 __asm(#r2) = _##name##_v2; \
368 register t3 _n3 __asm(#r3) = _##name##_v3; \
371 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
376 #define LP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
378 t1 _##name##_v1 = (v1); \
379 t2 _##name##_v2 = (v2); \
380 t3 _##name##_v3 = (v3); \
381 t4 _##name##_v4 = (v4); \
386 register rt _##name##_re __asm("d0"); \
387 void *const _##name##_bn = (bn); \
388 register t1 _n1 __asm(#r1) = _##name##_v1; \
389 register t2 _n2 __asm(#r2) = _##name##_v2; \
390 register t3 _n3 __asm(#r3) = _##name##_v3; \
391 register t4 _n4 __asm(#r4) = _##name##_v4; \
393 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
394 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
396 _##name##_re; \
400 #define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
402 t1 _##name##_v1 = (v1); \
403 t2 _##name##_v2 = (v2); \
404 t3 _##name##_v3 = (v3); \
405 t4 _##name##_v4 = (v4); \
411 void *const _##name##_bn = (bn); \
412 register t1 _n1 __asm(#r1) = _##name##_v1; \
413 register t2 _n2 __asm(#r2) = _##name##_v2; \
414 register t3 _n3 __asm(#r3) = _##name##_v3; \
415 register t4 _n4 __asm(#r4) = _##name##_v4; \
418 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
424 #define LP4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt) \
427 t1 _##name##_v1 = (v1); \
428 t2 _##name##_v2 = (v2); \
429 t3 _##name##_v3 = (v3); \
430 t4 _##name##_v4 = (v4); \
435 register rt _##name##_re __asm("d0"); \
436 void *const _##name##_bn = (bn); \
437 register t1 _n1 __asm(#r1) = _##name##_v1; \
438 register t2 _n2 __asm(#r2) = _##name##_v2; \
439 register t3 _n3 __asm(#r3) = _##name##_v3; \
440 register t4 _n4 __asm(#r4) = _##name##_v4; \
442 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
443 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
445 _##name##_re; \
449 #define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
451 t1 _##name##_v1 = (v1); \
452 t2 _##name##_v2 = (v2); \
453 t3 _##name##_v3 = (v3); \
454 t4 _##name##_v4 = (v4); \
455 t5 _##name##_v5 = (v5); \
460 register rt _##name##_re __asm("d0"); \
461 void *const _##name##_bn = (bn); \
462 register t1 _n1 __asm(#r1) = _##name##_v1; \
463 register t2 _n2 __asm(#r2) = _##name##_v2; \
464 register t3 _n3 __asm(#r3) = _##name##_v3; \
465 register t4 _n4 __asm(#r4) = _##name##_v4; \
466 register t5 _n5 __asm(#r5) = _##name##_v5; \
468 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
469 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
471 _##name##_re; \
475 #define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
477 t1 _##name##_v1 = (v1); \
478 t2 _##name##_v2 = (v2); \
479 t3 _##name##_v3 = (v3); \
480 t4 _##name##_v4 = (v4); \
481 t5 _##name##_v5 = (v5); \
487 void *const _##name##_bn = (bn); \
488 register t1 _n1 __asm(#r1) = _##name##_v1; \
489 register t2 _n2 __asm(#r2) = _##name##_v2; \
490 register t3 _n3 __asm(#r3) = _##name##_v3; \
491 register t4 _n4 __asm(#r4) = _##name##_v4; \
492 register t5 _n5 __asm(#r5) = _##name##_v5; \
495 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
501 #define LP5FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \
504 t1 _##name##_v1 = (v1); \
505 t2 _##name##_v2 = (v2); \
506 t3 _##name##_v3 = (v3); \
507 t4 _##name##_v4 = (v4); \
508 t5 _##name##_v5 = (v5); \
513 register rt _##name##_re __asm("d0"); \
514 void *const _##name##_bn = (bn); \
515 register t1 _n1 __asm(#r1) = _##name##_v1; \
516 register t2 _n2 __asm(#r2) = _##name##_v2; \
517 register t3 _n3 __asm(#r3) = _##name##_v3; \
518 register t4 _n4 __asm(#r4) = _##name##_v4; \
519 register t5 _n5 __asm(#r5) = _##name##_v5; \
521 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
522 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
524 _##name##_re; \
529 #define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
531 t1 _##name##_v1 = (v1); \
532 t2 _##name##_v2 = (v2); \
533 t3 _##name##_v3 = (v3); \
534 t4 _##name##_v4 = (v4); \
535 t5 _##name##_v5 = (v5); \
540 register rt _##name##_re __asm("d0"); \
541 void *const _##name##_bn = (bn); \
542 register t1 _n1 __asm(#r1) = _##name##_v1; \
543 register t2 _n2 __asm(#r2) = _##name##_v2; \
544 register t3 _n3 __asm(#r3) = _##name##_v3; \
545 register t4 _n4 __asm(#r4) = _##name##_v4; \
546 register t5 _n5 __asm(#r5) = _##name##_v5; \
548 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
549 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
551 _##name##_re; \
555 #define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
557 t1 _##name##_v1 = (v1); \
558 t2 _##name##_v2 = (v2); \
559 t3 _##name##_v3 = (v3); \
560 t4 _##name##_v4 = (v4); \
561 t5 _##name##_v5 = (v5); \
562 t6 _##name##_v6 = (v6); \
567 register rt _##name##_re __asm("d0"); \
568 void *const _##name##_bn = (bn); \
569 register t1 _n1 __asm(#r1) = _##name##_v1; \
570 register t2 _n2 __asm(#r2) = _##name##_v2; \
571 register t3 _n3 __asm(#r3) = _##name##_v3; \
572 register t4 _n4 __asm(#r4) = _##name##_v4; \
573 register t5 _n5 __asm(#r5) = _##name##_v5; \
574 register t6 _n6 __asm(#r6) = _##name##_v6; \
576 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
577 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \
579 _##name##_re; \
583 #define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
585 t1 _##name##_v1 = (v1); \
586 t2 _##name##_v2 = (v2); \
587 t3 _##name##_v3 = (v3); \
588 t4 _##name##_v4 = (v4); \
589 t5 _##name##_v5 = (v5); \
590 t6 _##name##_v6 = (v6); \
596 void *const _##name##_bn = (bn); \
597 register t1 _n1 __asm(#r1) = _##name##_v1; \
598 register t2 _n2 __asm(#r2) = _##name##_v2; \
599 register t3 _n3 __asm(#r3) = _##name##_v3; \
600 register t4 _n4 __asm(#r4) = _##name##_v4; \
601 register t5 _n5 __asm(#r5) = _##name##_v5; \
602 register t6 _n6 __asm(#r6) = _##name##_v6; \
605 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \
610 #define LP7(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
612 t1 _##name##_v1 = (v1); \
613 t2 _##name##_v2 = (v2); \
614 t3 _##name##_v3 = (v3); \
615 t4 _##name##_v4 = (v4); \
616 t5 _##name##_v5 = (v5); \
617 t6 _##name##_v6 = (v6); \
618 t7 _##name##_v7 = (v7); \
623 register rt _##name##_re __asm("d0"); \
624 void *const _##name##_bn = (bn); \
625 register t1 _n1 __asm(#r1) = _##name##_v1; \
626 register t2 _n2 __asm(#r2) = _##name##_v2; \
627 register t3 _n3 __asm(#r3) = _##name##_v3; \
628 register t4 _n4 __asm(#r4) = _##name##_v4; \
629 register t5 _n5 __asm(#r5) = _##name##_v5; \
630 register t6 _n6 __asm(#r6) = _##name##_v6; \
631 register t7 _n7 __asm(#r7) = _##name##_v7; \
633 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
634 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
636 _##name##_re; \
640 #define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
642 t1 _##name##_v1 = (v1); \
643 t2 _##name##_v2 = (v2); \
644 t3 _##name##_v3 = (v3); \
645 t4 _##name##_v4 = (v4); \
646 t5 _##name##_v5 = (v5); \
647 t6 _##name##_v6 = (v6); \
648 t7 _##name##_v7 = (v7); \
654 void *const _##name##_bn = (bn); \
655 register t1 _n1 __asm(#r1) = _##name##_v1; \
656 register t2 _n2 __asm(#r2) = _##name##_v2; \
657 register t3 _n3 __asm(#r3) = _##name##_v3; \
658 register t4 _n4 __asm(#r4) = _##name##_v4; \
659 register t5 _n5 __asm(#r5) = _##name##_v5; \
660 register t6 _n6 __asm(#r6) = _##name##_v6; \
661 register t7 _n7 __asm(#r7) = _##name##_v7; \
664 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
670 #define LP7A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
672 t1 _##name##_v1 = (v1); \
673 t2 _##name##_v2 = (v2); \
674 t3 _##name##_v3 = (v3); \
675 t4 _##name##_v4 = (v4); \
676 t5 _##name##_v5 = (v5); \
677 t6 _##name##_v6 = (v6); \
678 t7 _##name##_v7 = (v7); \
683 register rt _##name##_re __asm("d0"); \
684 void *const _##name##_bn = (bn); \
685 register t1 _n1 __asm(#r1) = _##name##_v1; \
686 register t2 _n2 __asm(#r2) = _##name##_v2; \
687 register t3 _n3 __asm(#r3) = _##name##_v3; \
688 register t4 _n4 __asm(#r4) = _##name##_v4; \
689 register t5 _n5 __asm(#r5) = _##name##_v5; \
690 register t6 _n6 __asm(#r6) = _##name##_v6; \
691 register t7 _n7 __asm(#r7) = _##name##_v7; \
693 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
694 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
696 _##name##_re; \
704 #define LP8(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
706 t1 _##name##_v1 = (v1); \
707 t2 _##name##_v2 = (v2); \
708 t3 _##name##_v3 = (v3); \
709 t4 _##name##_v4 = (v4); \
710 t5 _##name##_v5 = (v5); \
711 t6 _##name##_v6 = (v6); \
712 t7 _##name##_v7 = (v7); \
713 t8 _##name##_v8 = (v8); \
718 register rt _##name##_re __asm("d0"); \
719 void *const _##name##_bn = (bn); \
720 register t1 _n1 __asm(#r1) = _##name##_v1; \
721 register t2 _n2 __asm(#r2) = _##name##_v2; \
722 register t3 _n3 __asm(#r3) = _##name##_v3; \
723 register t4 _n4 __asm(#r4) = _##name##_v4; \
724 register t5 _n5 __asm(#r5) = _##name##_v5; \
725 register t6 _n6 __asm(#r6) = _##name##_v6; \
726 register t7 _n7 __asm(#r7) = _##name##_v7; \
727 register t8 _n8 __asm(#r8) = _##name##_v8; \
729 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
730 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \
732 _##name##_re; \
737 #define LP8NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
739 t1 _##name##_v1 = (v1); \
740 t2 _##name##_v2 = (v2); \
741 t3 _##name##_v3 = (v3); \
742 t4 _##name##_v4 = (v4); \
743 t5 _##name##_v5 = (v5); \
744 t6 _##name##_v6 = (v6); \
745 t7 _##name##_v7 = (v7); \
746 t8 _##name##_v8 = (v8); \
752 void *const _##name##_bn = (bn); \
753 register t1 _n1 __asm(#r1) = _##name##_v1; \
754 register t2 _n2 __asm(#r2) = _##name##_v2; \
755 register t3 _n3 __asm(#r3) = _##name##_v3; \
756 register t4 _n4 __asm(#r4) = _##name##_v4; \
757 register t5 _n5 __asm(#r5) = _##name##_v5; \
758 register t6 _n6 __asm(#r6) = _##name##_v6; \
759 register t7 _n7 __asm(#r7) = _##name##_v7; \
760 register t8 _n8 __asm(#r8) = _##name##_v8; \
763 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \
769 #define LP9(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
771 t1 _##name##_v1 = (v1); \
772 t2 _##name##_v2 = (v2); \
773 t3 _##name##_v3 = (v3); \
774 t4 _##name##_v4 = (v4); \
775 t5 _##name##_v5 = (v5); \
776 t6 _##name##_v6 = (v6); \
777 t7 _##name##_v7 = (v7); \
778 t8 _##name##_v8 = (v8); \
779 t9 _##name##_v9 = (v9); \
784 register rt _##name##_re __asm("d0"); \
785 void *const _##name##_bn = (bn); \
786 register t1 _n1 __asm(#r1) = _##name##_v1; \
787 register t2 _n2 __asm(#r2) = _##name##_v2; \
788 register t3 _n3 __asm(#r3) = _##name##_v3; \
789 register t4 _n4 __asm(#r4) = _##name##_v4; \
790 register t5 _n5 __asm(#r5) = _##name##_v5; \
791 register t6 _n6 __asm(#r6) = _##name##_v6; \
792 register t7 _n7 __asm(#r7) = _##name##_v7; \
793 register t8 _n8 __asm(#r8) = _##name##_v8; \
794 register t9 _n9 __asm(#r9) = _##name##_v9; \
796 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
797 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \
799 _##name##_re; \
804 #define LP9NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
806 t1 _##name##_v1 = (v1); \
807 t2 _##name##_v2 = (v2); \
808 t3 _##name##_v3 = (v3); \
809 t4 _##name##_v4 = (v4); \
810 t5 _##name##_v5 = (v5); \
811 t6 _##name##_v6 = (v6); \
812 t7 _##name##_v7 = (v7); \
813 t8 _##name##_v8 = (v8); \
814 t9 _##name##_v9 = (v9); \
820 void *const _##name##_bn = (bn); \
821 register t1 _n1 __asm(#r1) = _##name##_v1; \
822 register t2 _n2 __asm(#r2) = _##name##_v2; \
823 register t3 _n3 __asm(#r3) = _##name##_v3; \
824 register t4 _n4 __asm(#r4) = _##name##_v4; \
825 register t5 _n5 __asm(#r5) = _##name##_v5; \
826 register t6 _n6 __asm(#r6) = _##name##_v6; \
827 register t7 _n7 __asm(#r7) = _##name##_v7; \
828 register t8 _n8 __asm(#r8) = _##name##_v8; \
829 register t9 _n9 __asm(#r9) = _##name##_v9; \
832 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \
838 #define LP10(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
840 t1 _##name##_v1 = (v1); \
841 t2 _##name##_v2 = (v2); \
842 t3 _##name##_v3 = (v3); \
843 t4 _##name##_v4 = (v4); \
844 t5 _##name##_v5 = (v5); \
845 t6 _##name##_v6 = (v6); \
846 t7 _##name##_v7 = (v7); \
847 t8 _##name##_v8 = (v8); \
848 t9 _##name##_v9 = (v9); \
849 t10 _##name##_v10 = (v10); \
854 register rt _##name##_re __asm("d0"); \
855 void *const _##name##_bn = (bn); \
856 register t1 _n1 __asm(#r1) = _##name##_v1; \
857 register t2 _n2 __asm(#r2) = _##name##_v2; \
858 register t3 _n3 __asm(#r3) = _##name##_v3; \
859 register t4 _n4 __asm(#r4) = _##name##_v4; \
860 register t5 _n5 __asm(#r5) = _##name##_v5; \
861 register t6 _n6 __asm(#r6) = _##name##_v6; \
862 register t7 _n7 __asm(#r7) = _##name##_v7; \
863 register t8 _n8 __asm(#r8) = _##name##_v8; \
864 register t9 _n9 __asm(#r9) = _##name##_v9; \
865 register t10 _n10 __asm(#r10) = _##name##_v10; \
867 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
868 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \
870 _##name##_re; \
875 #define LP10NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
877 t1 _##name##_v1 = (v1); \
878 t2 _##name##_v2 = (v2); \
879 t3 _##name##_v3 = (v3); \
880 t4 _##name##_v4 = (v4); \
881 t5 _##name##_v5 = (v5); \
882 t6 _##name##_v6 = (v6); \
883 t7 _##name##_v7 = (v7); \
884 t8 _##name##_v8 = (v8); \
885 t9 _##name##_v9 = (v9); \
886 t10 _##name##_v10 = (v10); \
892 void *const _##name##_bn = (bn); \
893 register t1 _n1 __asm(#r1) = _##name##_v1; \
894 register t2 _n2 __asm(#r2) = _##name##_v2; \
895 register t3 _n3 __asm(#r3) = _##name##_v3; \
896 register t4 _n4 __asm(#r4) = _##name##_v4; \
897 register t5 _n5 __asm(#r5) = _##name##_v5; \
898 register t6 _n6 __asm(#r6) = _##name##_v6; \
899 register t7 _n7 __asm(#r7) = _##name##_v7; \
900 register t8 _n8 __asm(#r8) = _##name##_v8; \
901 register t9 _n9 __asm(#r9) = _##name##_v9; \
902 register t10 _n10 __asm(#r10) = _##name##_v10; \
905 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \
911 #define LP11(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, t11, v11, r11, bt, bn) \
913 t1 _##name##_v1 = (v1); \
914 t2 _##name##_v2 = (v2); \
915 t3 _##name##_v3 = (v3); \
916 t4 _##name##_v4 = (v4); \
917 t5 _##name##_v5 = (v5); \
918 t6 _##name##_v6 = (v6); \
919 t7 _##name##_v7 = (v7); \
920 t8 _##name##_v8 = (v8); \
921 t9 _##name##_v9 = (v9); \
922 t10 _##name##_v10 = (v10); \
923 t11 _##name##_v11 = (v11); \
928 register rt _##name##_re __asm("d0"); \
929 void *const _##name##_bn = (bn); \
930 register t1 _n1 __asm(#r1) = _##name##_v1; \
931 register t2 _n2 __asm(#r2) = _##name##_v2; \
932 register t3 _n3 __asm(#r3) = _##name##_v3; \
933 register t4 _n4 __asm(#r4) = _##name##_v4; \
934 register t5 _n5 __asm(#r5) = _##name##_v5; \
935 register t6 _n6 __asm(#r6) = _##name##_v6; \
936 register t7 _n7 __asm(#r7) = _##name##_v7; \
937 register t8 _n8 __asm(#r8) = _##name##_v8; \
938 register t9 _n9 __asm(#r9) = _##name##_v9; \
939 register t10 _n10 __asm(#r10) = _##name##_v10; \
940 register t11 _n11 __asm(#r11) = _##name##_v11; \
942 : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
943 : [libbase] "a" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10), "rf"(_n11) \
945 _##name##_re; \