compat/freebsd_network/pci.cpp

10 #include <compat/dev/pci/pcireg.h>
11 #include <compat/dev/pci/pcivar.h>
19 #	define TRACE_PCI(dev, format, args...) device_printf(dev, format , ##args)
21 #	define TRACE_PCI(dev, format, args...) do { } while (0)
61 pci_read_config(device_t dev, int offset, int size)
63 	pci_info* info = get_device_pci_info(dev);
67 	TRACE_PCI(dev, "pci_read_config(%i, %i) = 0x%x\n", offset, size, value);
73 pci_write_config(device_t dev, int offset, uint32_t value, int size)
75 	pci_info* info = get_device_pci_info(dev);
77 	TRACE_PCI(dev, "pci_write_config(%i, 0x%x, %i)\n", offset, value, size);
85 pci_get_vendor(device_t dev)
87 	return pci_read_config(dev, PCI_vendor_id, 2);
92 pci_get_device(device_t dev)
94 	return pci_read_config(dev, PCI_device_id, 2);
99 pci_get_subvendor(device_t dev)
101 	return pci_read_config(dev, PCI_subsystem_vendor_id, 2);
106 pci_get_subdevice(device_t dev)
108 	return pci_read_config(dev, PCI_subsystem_id, 2);
113 pci_get_revid(device_t dev)
115 	return pci_read_config(dev, PCI_revision, 1);
120 pci_get_domain(device_t dev)
126 pci_get_devid(device_t dev)
128 	return pci_read_config(dev, PCI_device_id, 2) << 16 |
129 		pci_read_config(dev, PCI_vendor_id, 2);
133 pci_get_cachelnsz(device_t dev)
135 	return pci_read_config(dev, PCI_line_size, 1);
139 pci_get_ether(device_t dev)
146 pci_get_bus(device_t dev)
149 		= &((struct root_device_softc *)dev->root->softc)->pci_info;
155 pci_get_slot(device_t dev)
158 		= &((struct root_device_softc *)dev->root->softc)->pci_info;
164 pci_get_function(device_t dev)
166 	pci_info* info = get_device_pci_info(dev);
182 pci_set_command_bit(device_t dev, uint16_t bit)
184 	uint16_t command = pci_read_config(dev, PCI_command, 2);
185 	pci_write_config(dev, PCI_command, command | bit, 2);
190 pci_enable_busmaster(device_t dev)
193 	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0)
194 		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
196 	pci_set_command_bit(dev, PCI_command_master);
202 pci_enable_io(device_t dev, int space)
218 	pci_set_command_bit(dev, bit);
219 	if (pci_read_config(dev, PCI_command, 2) & bit)
222 	device_printf(dev, "pci_enable_io(%d) failed.\n", space);
229 pci_find_cap(device_t dev, int capability, int *capreg)
231 	pci_info* info = get_device_pci_info(dev);
243 pci_find_extcap(device_t dev, int capability, int *capreg)
245 	pci_info* info = get_device_pci_info(dev);
257 pci_msi_count(device_t dev)
259 	pci_info* info = get_device_pci_info(dev);
265 pci_alloc_msi(device_t dev, int *count)
267 	pci_info* info = get_device_pci_info(dev);
274 	((struct root_device_softc *)dev->root->softc)->is_msi = true;
281 pci_release_msi(device_t dev)
283 	pci_info* info = get_device_pci_info(dev);
285 	((struct root_device_softc *)dev->root->softc)->is_msi = false;
286 	((struct root_device_softc *)dev->root->softc)->is_msix = false;
292 pci_msix_table_bar(device_t dev)
294 	pci_info* info = get_device_pci_info(dev);
310 pci_msix_count(device_t dev)
312 	pci_info* info = get_device_pci_info(dev);
318 pci_alloc_msix(device_t dev, int *count)
320 	pci_info* info = get_device_pci_info(dev);
327 	((struct root_device_softc *)dev->root->softc)->is_msix = true;
334 pci_get_max_read_req(device_t dev)
339 	if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) != 0)
341 	val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
349 pci_set_max_read_req(device_t dev, int size)
354 	if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) != 0)
361 	val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
364 	pci_write_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, val, 2);
370 pci_get_powerstate(device_t dev)
376 	if (pci_find_extcap(dev, PCIY_PMG, &capabilityRegister) != EOK)
379 	status = pci_read_config(dev, capabilityRegister + PCIR_POWER_STATUS, 2);
397 	TRACE_PCI(dev, "%s: D%i\n", __func__, powerState);
403 pci_set_powerstate(device_t dev, int newPowerState)
412 	if (pci_find_extcap(dev, PCIY_PMG, &capabilityRegister) != EOK)
415 	oldPowerState = pci_get_powerstate(dev);
428 	currentPowerManagementStatus = pci_read_config(dev, capabilityRegister
431 	powerManagementCapabilities = pci_read_config(dev, capabilityRegister
455 	TRACE_PCI(dev, "%s: D%i -> D%i\n", __func__, oldPowerState, newPowerState);
456 	pci_write_config(dev, capabilityRegister + PCIR_POWER_STATUS,