rtwn/rtl8192c/r92c_tx.c

69 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
76 		txd->txdw4 |= htole32(R92C_TXDW4_DATA_BW40);
77 		txd->txdw4 |= htole32(SM(R92C_TXDW4_DATA_SCO, extc_offset));
82 r92c_tx_protection(struct rtwn_softc *sc, struct r92c_tx_desc *txd,
90 		txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF);
93 		txd->txdw4 |= htole32(R92C_TXDW4_RTSEN);
107 		txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, ridx));
109 		txd->txdw5 |= htole32(SM(R92C_TXDW5_RTSRATE_FB_LMT, 0xf));
113 			txd->txdw4 |= htole32(R92C_TXDW4_RTS_SHORT);
118 r92c_tx_raid(struct rtwn_softc *sc, struct r92c_tx_desc *txd,
168 	txd->txdw1 |= htole32(SM(R92C_TXDW1_RAID, raid));
175 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
180 		txd->txdw5 |= htole32(R92C_TXDW5_SGI);
185 		txd->txdw5 |= htole32(R92C_TXDW5_SGI);
191 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
194 		txd->txdw1 |= htole32(R92C_TXDW1_AGGEN);
196 		txd->txdw1 |= htole32(R92C_TXDW1_AGGBK);
202 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
204 	txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN);
210 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
212 	txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, id));
217 	txd->txdw4 &= ~htole32(SM(R92C_TXDW4_RTSRATE, R92C_TXDW4_RTSRATE_M));
218 	txd->txdw4 &= ~htole32(R92C_TXDW4_RTS_SHORT);
232 	struct r92c_tx_desc *txd;
252 	txd = (struct r92c_tx_desc *)buf;
253 	txd->flags0 |= R92C_FLAGS0_LSG | R92C_FLAGS0_FSG;
255 		txd->flags0 |= R92C_FLAGS0_BMCAST;
261 			txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA);
262 			txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT,
275 				txd->txdw2 |= htole32(SM(R92C_TXDW2_AMPDU_DEN,
277 				txd->txdw6 |= htole32(SM(R92C_TXDW6_MAX_AGG,
281 				txd->txdw2 |= htole32(R92C_TXDW2_CCX_RPT);
290 				txd->txdw4 |= htole32(R92C_TXDW4_DATA_SHPRE);
294 				r92c_tx_set_ht40(sc, txd, ni);
295 				r92c_tx_set_sgi(sc, txd, ni);
309 				r92c_tx_protection(sc, txd, prot, ridx);
317 	txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, qsel));
319 	rtwn_r92c_tx_setup_macid(sc, txd, macid);
320 	txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx));
322 	txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE_FB_LMT, 0x1f));
323 	txd->txdw4 |= htole32(SM(R92C_TXDW4_PORT_ID, uvp->id));
324 	r92c_tx_raid(sc, txd, ni, ismcast);
328 		txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE);
332 		rtwn_r92c_tx_setup_hwseq(sc, txd);
333 		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, uvp->id));
344 		txd->txdseq = htole16(seqno);
355 	struct r92c_tx_desc *txd;
366 	txd = (struct r92c_tx_desc *)buf;
367 	txd->flags0 |= R92C_FLAGS0_LSG | R92C_FLAGS0_FSG;
369 		txd->flags0 |= R92C_FLAGS0_BMCAST;
372 		txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA);
373 		txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT,
377 		r92c_tx_protection(sc, txd, IEEE80211_PROT_RTSCTS, ridx);
379 		r92c_tx_protection(sc, txd, IEEE80211_PROT_CTSONLY, ridx);
381 	rtwn_r92c_tx_setup_macid(sc, txd, RTWN_MACID_BC);
382 	txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT));
385 	txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx));
386 	txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE_FB_LMT, 0x1f));
387 	txd->txdw4 |= htole32(SM(R92C_TXDW4_PORT_ID, uvp->id));
388 	txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE);
389 	r92c_tx_raid(sc, txd, ni, ismcast);
393 		rtwn_r92c_tx_setup_hwseq(sc, txd);
394 		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, uvp->id));
397 		txd->txdseq |= htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE);
405 	struct r92c_tx_desc *txd = (struct r92c_tx_desc *)buf;
407 	txd->flags0 = R92C_FLAGS0_FSG | R92C_FLAGS0_LSG | R92C_FLAGS0_OWN;
408 	txd->txdw1 = htole32(
411 	txd->txdw4 = htole32(R92C_TXDW4_DRVRATE);
412 	txd->txdw4 |= htole32(SM(R92C_TXDW4_PORT_ID, id));
414 		txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE,
417 		txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE,
422 		rtwn_r92c_tx_setup_hwseq(sc, txd);
423 		txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, id));
430 	const struct r92c_tx_desc *txd = buf;
434 	if (txd->txdw4 & htole32(R92C_TXDW4_DATA_SHPRE))
436 	if (txd->txdw5 & htole32(R92C_TXDW5_SGI))