Lines Matching refs:txq
955 htole64(sc->txq[IWX_DQA_CMD_QUEUE].desc_dma.paddr);
1066 htole64(sc->txq[IWX_DQA_CMD_QUEUE].desc_dma.paddr);
2065 * The command is queue sc->txq[0], our default queue is sc->txq[1].
2068 * which aggregation is enabled. We map TID 0-7 to sc->txq[2:9].
2687 for (i = 0; i < nitems(sc->txq); i++)
2688 iwx_reset_tx_ring(sc, &sc->txq[i]);
2835 struct iwx_tx_ring *ring = &sc->txq[qid];
2923 struct iwx_tx_ring *ring = &sc->txq[qid];
3722 ring = &sc->txq[qid];
5365 struct iwx_tx_ring *ring = &sc->txq[qid];
5470 ring = &sc->txq[qid];
5744 struct iwx_tx_ring *ring = &sc->txq[IWX_DQA_CMD_QUEUE];
5980 struct iwx_tx_ring *ring = &sc->txq[IWX_DQA_CMD_QUEUE];
6115 iwx_tx_update_byte_tbl(struct iwx_softc *sc, struct iwx_tx_ring *txq,
6135 struct iwx_gen3_bc_tbl_entry *scd_bc_tbl = txq->bc_tbl.vaddr;
6140 struct iwx_agn_scd_bc_tbl *scd_bc_tbl = txq->bc_tbl.vaddr;
6147 bus_dmamap_sync(sc->sc_dmat, txq->bc_tbl.map, 0,
6148 txq->bc_tbl.map->dm_mapsize, BUS_DMASYNC_PREWRITE);
6198 ring = &sc->txq[qid];
6433 struct iwx_tx_ring *txq;
6435 if (qid >= nitems(sc->txq))
6438 txq = &sc->txq[qid];
6439 if (tid != txq->tid)
6442 iwx_txq_advance(sc, txq, read_after);
6802 struct iwx_tx_ring *ring = &sc->txq[i];
9697 for (i = 0; i < nitems(sc->txq); i++) {
9698 struct iwx_tx_ring *ring = &sc->txq[i];
9767 struct iwx_tx_ring *ring = &sc->txq[qid];
11303 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) {
11304 err = iwx_alloc_tx_ring(sc, &sc->txq[txq_i], txq_i);
11435 iwx_free_tx_ring(sc, &sc->txq[txq_i]);