dev/ath/if_ath_tx_ht.c

492 	 * on highest rate in rate series (i.e. first rate) to determine
559  * It's the lowest of the four rate series 4ms frame length.
606  * Setup a 11n rate series structure
610  * This uses the rate series stuf from ath_tx_rate_fill_rcflags().
617     struct ath_buf *bf, HAL_11N_RATE_SERIES *series)
632 	 * If this is the first frame in an aggregate series,
644 	memset(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4);
650 		series[i].Tries = rc[i].tries;
659 		series[i].ChSel = sc->sc_cur_txchainmask;
662 		 * Setup rate and TX power cap for this series.
664 		series[i].Rate = rt->info[rc[i].rix].rateCode;
665 		series[i].RateIndex = rc[i].rix;
666 		series[i].tx_power_cap = rc[i].tx_power_cap;
672 			series[i].RateFlags |= HAL_RATESERIES_RTS_CTS;
679 				series[i].RateFlags |= HAL_RATESERIES_2040;
682 				series[i].RateFlags |= HAL_RATESERIES_HALFGI;
685 				series[i].RateFlags |= HAL_RATESERIES_STBC;
699 			series[i].PktDuration =
701 				, series[i].Rate
702 				, HT_RC_2_STREAMS(series[i].Rate)
703 				, series[i].RateFlags & HAL_RATESERIES_2040
704 				, series[i].RateFlags & HAL_RATESERIES_HALFGI);
707 				series[i].Rate |=
710 			series[i].PktDuration = ath_hal_computetxtime(ah,
718 ath_rateseries_print(struct ath_softc *sc, HAL_11N_RATE_SERIES *series)
722 		device_printf(sc->sc_dev ,"series %d: rate %x; tries %d; "
725 		    series[i].Rate,
726 		    series[i].Tries,
727 		    series[i].PktDuration,
728 		    series[i].ChSel,
729 		    series[i].tx_power_cap,
730 		    series[i].RateFlags);
746 	HAL_11N_RATE_SERIES series[4];
754 	memset(&series, 0, sizeof(series));
756 	ath_rateseries_setup(sc, ni, bf, series);
760 		ath_rateseries_print(sc, series);
771 	    series,	/* 11n rate series */
772 	    4,		/* number of series */
802  * The rate series, descriptor setup, linking, etc is all done