ath_hal/ar9002/ar9287_reset.c

335 	const struct modal_eep_ar9287_header *pModal;
358 	pModal = &pEepData->modalHeader;
363 	AH5416(ah)->ah_ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
457 	const struct modal_eep_ar9287_header *pModal = &eep->modalHeader;
463 	pModal = &eep->modalHeader;
465 	antWrites[0] = (uint16_t)((pModal->antCtrlCommon >> 28) & 0xF);
466 	antWrites[1] = (uint16_t)((pModal->antCtrlCommon >> 24) & 0xF);
467 	antWrites[2] = (uint16_t)((pModal->antCtrlCommon >> 20) & 0xF);
468 	antWrites[3] = (uint16_t)((pModal->antCtrlCommon >> 16) & 0xF);
469 	antWrites[4] = (uint16_t)((pModal->antCtrlCommon >> 12) & 0xF);
470 	antWrites[5] = (uint16_t)((pModal->antCtrlCommon >> 8) & 0xF);
471 	antWrites[6] = (uint16_t)((pModal->antCtrlCommon >> 4)  & 0xF);
472 	antWrites[7] = (uint16_t)(pModal->antCtrlCommon & 0xF);
477 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 28) & 0xf);
478 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 10) & 0x3);
479 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 8) & 0x3);
481 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 6) & 0x3);
482 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 4) & 0x3);
483 		antWrites[j++] = (uint16_t)((pModal->antCtrlChain[i] >> 2) & 0x3);
484 		antWrites[j++] = (uint16_t)(pModal->antCtrlChain[i] & 0x3);
487 	OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon);
493 			  pModal->antCtrlChain[i]);
500 			  SM(pModal->iqCalICh[i],
502 			  SM(pModal->iqCalQCh[i],
505 		txRxAttenLocal = pModal->txRxAttenCh[i];
509 			      pModal->bswMargin[i]);
512 			      pModal->bswAtten[i]);
518 			      pModal->rxTxMarginCh[i]);
523 			      AR_PHY_SETTLING_SWITCH, pModal->swSettleHt40);
526 			      AR_PHY_SETTLING_SWITCH, pModal->switchSettling);
529 		      AR_PHY_DESIRED_SZ_ADC, pModal->adcDesiredSize);
532 		  SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF)
533 		  | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF)
534 		  | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON)
535 		  | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON));
538 		      AR_PHY_TX_END_TO_A2_RX_ON, pModal->txEndToRxOn);
541 		      AR9280_PHY_CCA_THRESH62, pModal->thresh62);
543 		      AR_PHY_EXT_CCA0_THRESH62, pModal->thresh62);
552 	regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
553 		   SM(pModal->db2, AR9287_AN_RF2G3_DB2) |
554 		   SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) |
555 		   SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) |
556 		   SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) |
557 		   SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF));
569 	regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
570 		   SM(pModal->db2, AR9287_AN_RF2G3_DB2) |
571 		   SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) |
572 		   SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) |
573 		   SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) |
574 		   SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF));
579 	    AR_PHY_TX_FRAME_TO_DATA_START, pModal->txFrameToDataStart);
581 	    AR_PHY_TX_FRAME_TO_PA_ON, pModal->txFrameToPaOn);
584 	    AR9287_AN_TOP2_XPABIAS_LVL, pModal->xpaBiasLvl);