ath_hal/ar5212/ar5112.c

158 	struct ar5112State *priv = AR5112(ah);
160 	HALASSERT(priv != AH_NULL);
162 	case 1: return priv->Bank1Data;
163 	case 2: return priv->Bank2Data;
164 	case 3: return priv->Bank3Data;
165 	case 6: return priv->Bank6Data;
166 	case 7: return priv->Bank7Data;
195 	struct ar5112State *priv = AR5112(ah);
199 	HALASSERT(priv);
245 	RF_BANK_SETUP(priv, 1, 1);
248 	RF_BANK_SETUP(priv, 2, modesIndex);
251 	RF_BANK_SETUP(priv, 3, modesIndex);
254 	RF_BANK_SETUP(priv, 6, modesIndex);
256 	ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdSel,     1, 302, 0);
258 	ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[0], 2, 270, 0);
259 	ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[1], 2, 257, 0);
262 		ar5212ModifyRfBuffer(priv->Bank6Data,
264 		ar5212ModifyRfBuffer(priv->Bank6Data,
266 		ar5212ModifyRfBuffer(priv->Bank6Data,
268 		ar5212ModifyRfBuffer(priv->Bank6Data,
270 		ar5212ModifyRfBuffer(priv->Bank6Data,
272 		ar5212ModifyRfBuffer(priv->Bank6Data,
278 		ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 287, 0);
279 		ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 290, 0);
281 		ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 279, 0);
282 		ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 282, 0);
288 		ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 90, 2);
289 		ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 92, 2);
290 		ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 94, 2);
291 		ar5212ModifyRfBuffer(priv->Bank6Data, 2, 1, 254, 2);
296         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 281, 1);
297         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 1, 3);
298         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 3, 3);
299         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 139, 3);
300         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 140, 3);
304 	RF_BANK_SETUP(priv, 7, modesIndex);
306 		ar5212ModifyRfBuffer(priv->Bank7Data,
309 	ar5212ModifyRfBuffer(priv->Bank7Data, gainI, 6, 14, 0);
317         	ar5212ModifyRfBuffer(priv->Bank7Data, rfDelay, 4, 58, 0);
318         	ar5212ModifyRfBuffer(priv->Bank7Data, rfPeriod, 4, 70, 0);
328 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_5112, priv->Bank1Data, regWrites);
329 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_5112, priv->Bank2Data, regWrites);
330 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_5112, priv->Bank3Data, regWrites);
331 	HAL_INI_WRITE_BANK(ah, ar5212Bank6_5112, priv->Bank6Data, regWrites);
332 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_5112, priv->Bank7Data, regWrites);
858 	struct ar5112State *priv;
863 	priv = ath_hal_malloc(sizeof(struct ar5112State));
864 	if (priv == AH_NULL) {
870 	priv->base.rfDetach		= ar5112RfDetach;
871 	priv->base.writeRegs		= ar5112WriteRegs;
872 	priv->base.getRfBank		= ar5112GetRfBank;
873 	priv->base.setChannel		= ar5112SetChannel;
874 	priv->base.setRfRegs		= ar5112SetRfRegs;
875 	priv->base.setPowerTable	= ar5112SetPowerTable;
876 	priv->base.getChannelMaxMinPower = ar5112GetChannelMaxMinPower;
877 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
879 	ahp->ah_pcdacTable = priv->pcdacTable;
880 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
881 	ahp->ah_rfHal = &priv->base;