Lines Matching refs:series
707 HAL_11N_RATE_SERIES series[],
747 tx_mode = ar9300_get_tx_mode(series[0].RateFlags);
748 txpower = ar9300_get_rate_txpower(ah, mode, series[0].RateIndex,
749 series[0].ChSel, tx_mode);
755 set_11n_tx_power(0, AH_MIN(txpower, series[0].tx_power_cap));
761 ads->ds_ctl13 = set_11n_tries(series, 0)
762 | set_11n_tries(series, 1)
763 | set_11n_tries(series, 2)
764 | set_11n_tries(series, 3)
768 ads->ds_ctl14 = set_11n_rate(series, 0)
769 | set_11n_rate(series, 1)
770 | set_11n_rate(series, 2)
771 | set_11n_rate(series, 3);
773 ads->ds_ctl15 = set_11n_pkt_dur_rts_cts(series, 0)
774 | set_11n_pkt_dur_rts_cts(series, 1);
776 ads->ds_ctl16 = set_11n_pkt_dur_rts_cts(series, 2)
777 | set_11n_pkt_dur_rts_cts(series, 3);
779 ads->ds_ctl18 = set_11n_rate_flags(series, 0)
780 | set_11n_rate_flags(series, 1)
781 | set_11n_rate_flags(series, 2)
782 | set_11n_rate_flags(series, 3)
792 tx_mode = ar9300_get_tx_mode(series[1].RateFlags);
794 ah, mode, series[1].RateIndex, series[1].ChSel, tx_mode);
799 set_11n_tx_power(1, AH_MIN(txpower, series[1].tx_power_cap));
804 tx_mode = ar9300_get_tx_mode(series[2].RateFlags);
806 ah, mode, series[2].RateIndex, series[2].ChSel, tx_mode);
811 set_11n_tx_power(2, AH_MIN(txpower, series[2].tx_power_cap));
815 tx_mode = ar9300_get_tx_mode(series[3].RateFlags);
817 ah, mode, series[3].RateIndex, series[3].ChSel, tx_mode);
822 set_11n_tx_power(3, AH_MIN(txpower, series[3].tx_power_cap));
828 * ctl19 for rate series 0 ... ctrl22 for series 3