Lines Matching refs:mask
390 u_int32_t reg_mask; // mask of register
391 u_int32_t reg_mask_offset; // mask offset of register
426 u_int32_t ah_tx_desc_mask; /* mask for TXDESC */
438 u_int8_t ah_tx_chainmask_cfg; /* chain mask config */
490 u_int32_t ah_gpio_mask; /* copy of enabled GPIO mask */
526 u_int32_t ah_avail_gen_timers; /* mask of available timers */
568 u_int8_t ah_tx_chainmask; /* tx chain mask */
569 u_int8_t ah_rx_chainmask; /* rx chain mask */
574 u_int8_t ah_tx_cal_chainmask; /* tx cal chain mask */
575 u_int8_t ah_rx_cal_chainmask; /* rx cal chain mask */
1260 extern int ar9300_gpio_set_mask(struct ath_hal *ah, u_int32_t mask, u_int32_t pol_map);
1708 extern void ar9300_set_txchainmaskopt(struct ath_hal *ah, u_int8_t mask);