dev/e1000/e1000_nvm.c

38 static void e1000_reload_nvm_generic(struct e1000_hw *hw);
42  *  @hw: pointer to the HW structure
46 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
48 	struct e1000_nvm_info *nvm = &hw->nvm;
65  *  @hw: pointer to the HW structure
70 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
80  *  @hw: pointer to the HW structure
82 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
90  *  @hw: pointer to the HW structure
93 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
102  *  @hw: pointer to the HW structure
107 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
117  *  @hw: pointer to the HW structure
122 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
125 	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
126 	E1000_WRITE_FLUSH(hw);
127 	usec_delay(hw->nvm.delay_usec);
132  *  @hw: pointer to the HW structure
137 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
140 	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
141 	E1000_WRITE_FLUSH(hw);
142 	usec_delay(hw->nvm.delay_usec);
147  *  @hw: pointer to the HW structure
155 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
157 	struct e1000_nvm_info *nvm = &hw->nvm;
158 	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
176 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
177 		E1000_WRITE_FLUSH(hw);
181 		e1000_raise_eec_clk(hw, &eecd);
182 		e1000_lower_eec_clk(hw, &eecd);
188 	E1000_WRITE_REG(hw, E1000_EECD, eecd);
193  *  @hw: pointer to the HW structure
202 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
210 	eecd = E1000_READ_REG(hw, E1000_EECD);
217 		e1000_raise_eec_clk(hw, &eecd);
219 		eecd = E1000_READ_REG(hw, E1000_EECD);
225 		e1000_lower_eec_clk(hw, &eecd);
233  *  @hw: pointer to the HW structure
239 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
248 			reg = E1000_READ_REG(hw, E1000_EERD);
250 			reg = E1000_READ_REG(hw, E1000_EEWR);
263  *  @hw: pointer to the HW structure
269 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
271 	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
276 	E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
277 	eecd = E1000_READ_REG(hw, E1000_EECD);
283 		eecd = E1000_READ_REG(hw, E1000_EECD);
289 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
299  *  @hw: pointer to the HW structure
303 static void e1000_standby_nvm(struct e1000_hw *hw)
305 	struct e1000_nvm_info *nvm = &hw->nvm;
306 	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
312 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
313 		E1000_WRITE_FLUSH(hw);
316 		e1000_raise_eec_clk(hw, &eecd);
320 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
321 		E1000_WRITE_FLUSH(hw);
324 		e1000_lower_eec_clk(hw, &eecd);
328 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
329 		E1000_WRITE_FLUSH(hw);
332 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
333 		E1000_WRITE_FLUSH(hw);
340  *  @hw: pointer to the HW structure
344 void e1000_stop_nvm(struct e1000_hw *hw)
350 	eecd = E1000_READ_REG(hw, E1000_EECD);
351 	if (hw->nvm.type == e1000_nvm_eeprom_spi) {
354 		e1000_lower_eec_clk(hw, &eecd);
355 	} else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
358 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
359 		e1000_raise_eec_clk(hw, &eecd);
360 		e1000_lower_eec_clk(hw, &eecd);
366  *  @hw: pointer to the HW structure
370 void e1000_release_nvm_generic(struct e1000_hw *hw)
376 	e1000_stop_nvm(hw);
378 	eecd = E1000_READ_REG(hw, E1000_EECD);
380 	E1000_WRITE_REG(hw, E1000_EECD, eecd);
385  *  @hw: pointer to the HW structure
389 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
391 	struct e1000_nvm_info *nvm = &hw->nvm;
392 	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
400 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
403 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
409 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
410 		E1000_WRITE_FLUSH(hw);
419 			e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
420 						 hw->nvm.opcode_bits);
421 			spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
426 			e1000_standby_nvm(hw);
441  *  @hw: pointer to the HW structure
448 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
450 	struct e1000_nvm_info *nvm = &hw->nvm;
467 	ret_val = nvm->ops.acquire(hw);
471 	ret_val = e1000_ready_nvm_eeprom(hw);
475 	e1000_standby_nvm(hw);
481 	e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
482 	e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
489 		word_in = e1000_shift_in_eec_bits(hw, 16);
494 	nvm->ops.release(hw);
501  *  @hw: pointer to the HW structure
508 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
511 	struct e1000_nvm_info *nvm = &hw->nvm;
527 	ret_val = nvm->ops.acquire(hw);
531 	ret_val = e1000_ready_nvm_eeprom(hw);
537 		e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
538 		e1000_shift_out_eec_bits(hw, (u16)(offset + i),
544 		data[i] = e1000_shift_in_eec_bits(hw, 16);
545 		e1000_standby_nvm(hw);
549 	nvm->ops.release(hw);
556  *  @hw: pointer to the HW structure
563 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
565 	struct e1000_nvm_info *nvm = &hw->nvm;
584 		E1000_WRITE_REG(hw, E1000_EERD, eerd);
585 		ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
589 		data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
601  *  @hw: pointer to the HW structure
611 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
613 	struct e1000_nvm_info *nvm = &hw->nvm;
631 		ret_val = nvm->ops.acquire(hw);
635 		ret_val = e1000_ready_nvm_eeprom(hw);
637 			nvm->ops.release(hw);
641 		e1000_standby_nvm(hw);
644 		e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
647 		e1000_standby_nvm(hw);
656 		e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
657 		e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
664 			e1000_shift_out_eec_bits(hw, word_out, 16);
668 				e1000_standby_nvm(hw);
673 		nvm->ops.release(hw);
681  *  @hw: pointer to the HW structure
691 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
694 	struct e1000_nvm_info *nvm = &hw->nvm;
711 	ret_val = nvm->ops.acquire(hw);
715 	ret_val = e1000_ready_nvm_eeprom(hw);
719 	e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
722 	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
724 	e1000_standby_nvm(hw);
727 		e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
730 		e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
733 		e1000_shift_out_eec_bits(hw, data[words_written], 16);
735 		e1000_standby_nvm(hw);
738 			eecd = E1000_READ_REG(hw, E1000_EECD);
750 		e1000_standby_nvm(hw);
755 	e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
758 	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
761 	nvm->ops.release(hw);
768  *  @hw: pointer to the HW structure
775 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
786 	if ((hw->mac.type == e1000_i210 ||
787 	     hw->mac.type == e1000_i211) &&
788 	     !e1000_get_flash_presence_i210(hw)) {
798 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
804 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
849 	ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
870 		ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
885  *  @hw: pointer to the HW structure
891 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
905 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
911 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
923 	ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
944  *  @hw: pointer to the HW structure
950 s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
957 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
967 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
980  *  @hw: pointer to the HW structure
990 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1001 		ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,
1018 		ret_val = e1000_get_pba_block_size(hw, eeprom_buf,
1028 			ret_val = e1000_read_nvm(hw, pba->word[1],
1050  *  @hw: pointer to the HW structure
1059 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1068 		ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,
1086 			ret_val = e1000_write_nvm(hw, pba->word[1],
1108  *  @hw: pointer to the HW structure
1118 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
1128 		ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);
1142 			ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,
1168  *  @hw: pointer to the HW structure
1174 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
1180 	rar_high = E1000_READ_REG(hw, E1000_RAH(0));
1181 	rar_low = E1000_READ_REG(hw, E1000_RAL(0));
1184 		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
1187 		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
1190 		hw->mac.addr[i] = hw->mac.perm_addr[i];
1197  *  @hw: pointer to the HW structure
1202 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
1211 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1229  *  @hw: pointer to the HW structure
1235 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
1244 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1252 	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
1261  *  @hw: pointer to the HW structure
1266 static void e1000_reload_nvm_generic(struct e1000_hw *hw)
1273 	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1275 	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1276 	E1000_WRITE_FLUSH(hw);
1281  *  @hw: pointer to the HW structure
1286 void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
1297 	switch (hw->mac.type) {
1299 		e1000_read_invm_version(hw, fw_vers);
1305 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1310 			hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1320 		if (!(e1000_get_flash_presence_i210(hw))) {
1321 			e1000_read_invm_version(hw, fw_vers);
1326 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1328 		hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
1332 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
1334 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
1354 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1357 	hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1379 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);
1380 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);
1384 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
1385 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);