dev/e1000/e1000_ich8lan.c

94 static s32  e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset,
95 				   u16 words, u16 *data);
96 static s32  e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
97 			       u16 *data);
98 static s32  e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset,
99 				    u16 words, u16 *data);
104 					    u16 *data);
113 					   u16 *speed, u16 *duplex);
129 					  u8 size, u16 *data);
139 					  u32 offset, u16 *data);
154 		u16 flcdone:1; /* bit 0 Flash Cycle Done */
155 		u16 flcerr:1; /* bit 1 Flash Cycle Error */
156 		u16 dael:1; /* bit 2 Direct Access error Log */
157 		u16 berasesz:2; /* bit 4:3 Sector Erase Size */
158 		u16 flcinprog:1; /* bit 5 flash cycle in Progress */
159 		u16 reserved1:2; /* bit 13:6 Reserved */
160 		u16 reserved2:6; /* bit 13:6 Reserved */
161 		u16 fldesvalid:1; /* bit 14 Flash Descriptor Valid */
162 		u16 flockdn:1; /* bit 15 Flash Config Lock-Down */
164 	u16 regval;
171 		u16 flcgo:1;   /* 0 Flash Cycle Go */
172 		u16 flcycle:2;   /* 2:1 Flash Cycle */
173 		u16 reserved:5;   /* 7:3 Reserved  */
174 		u16 fldbcount:2;   /* 9:8 Flash Data Byte Count */
175 		u16 flockdn:6;   /* 15:10 Reserved */
177 	u16 regval;
188 	u16 regval;
203 	u16 phy_reg = 0;
206 	u16 retry_count;
299 		u16 count = 20;
552 	u16 i = 0;
645 	u16 i;
665 		nvm->flash_bank_size /= sizeof(u16);
695 		nvm->flash_bank_size /= sizeof(u16);
850 static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,
851 					 u16 *data, bool read)
879 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)
894 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)
919 	u16 lpa, pcs_status, adv, adv_addr, lpi_ctrl, data;
1021 	u16 reg;
1095 static u64 e1000_ltr2ns(u16 ltr)
1129 	u16 lat_enc = 0;	/* latency encoded */
1135 		u16 speed, duplex, scale = 0;
1136 		u16 max_snoop, max_nosnoop;
1137 		u16 max_ltr_enc;	/* max LTR latency encoded */
1180 		lat_enc = (u16)((scale << E1000_LTRV_SCALE_SHIFT) | value);
1271 	u16 phy_reg;
1272 	u16 oem_reg = 0;
1422 	u16 phy_reg;
1562 	u16 emi_addr, emi_val = 0;
1564 	u16 phy_reg;
1595 		u16 speed, duplex;
1656 			u16 data;
1657 			u16 ptr_gap;
2172 	u16 phy_reg = 0;
2190 					   (u16)(hw->mac.mta_shadow[i] &
2193 					   (u16)((hw->mac.mta_shadow[i] >> 16) &
2240 	u16 phy_data;
2284 	u16 word_addr, reg_data, reg_addr, phy_page = 0;
2358 							(u16)data);
2366 	word_addr = (u16)(cnf_base_addr << 1);
2412 	u16 status_reg = 0;
2497 	u16 kmrn_reg = 0;
2548 	u16 oem_reg;
2614 	u16 data;
2637 	u16 phy_data;
2724 	u16 i, phy_reg = 0;
2740 					   (u16)(mac_reg & 0xFFFF));
2742 					   (u16)((mac_reg >> 16) & 0xFFFF));
2746 					   (u16)(mac_reg & 0xFFFF));
2748 					   (u16)((mac_reg & E1000_RAH_AV)
2785 	u16 phy_reg, data;
2787 	u16 i;
2995 	u16 status_reg = 0;
3011 			u16 pm_phy_reg;
3102 	u16 reg;
3204 	u16 oem_reg;
3240 	u16 data;
3336 	u16 data;
3424 	u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
3526 static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
3527 			      u16 *data)
3535 	u16 offset_to_read;
3536 	u16 i;
3575 					data[i] = (u16)(dword & 0xFFFF);
3577 					data[i] = (u16)((dword >> 16) & 0xFFFF);
3594 				data[i] = (u16)(dword & 0xFFFF);
3599 				data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
3621 static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
3622 				  u16 *data)
3629 	u16 i, word;
3835 					 u16 *data)
3860 	u16 word = 0;
3888 					 u8 size, u16 *data)
3931 				*data = (u16)(flash_data & 0x0000FFFF);
4041 static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
4042 				   u16 *data)
4046 	u16 i;
4247 	u16 data = 0;
4394 	u16 data;
4395 	u16 word;
4396 	u16 valid_csum_mask;
4448 					  u8 size, u16 data)
4636 	u16 word = (u16)data;
4656 	u16 program_retries;
4693 	u16 program_retries;
4843 static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)
4880 	u16 data, i, temp, shift;
4972 	u16 kum_cfg;
4975 	u16 pci_cfg;
5111 	u16 i;
5332 	u16 reg_data;
5448 static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,
5449 					  u16 *duplex)
5488 	u16 i, data;
5575 	u16 data;
5629 	u16 reg_data = 0;
5678 		u16 phy_reg, device_id = hw->device_id;
5696 			u16 eee_advert;
5820 		u16 phy_reg;
5929 				     (u16)hw->mac.ledctl_mode1);
5943 				     (u16)hw->mac.ledctl_default);
5954 	u16 data = (u16)hw->mac.ledctl_mode2;
5986 	u16 data = (u16)hw->mac.ledctl_mode1;
6097 	u16 phy_data;
6167 	u16 kmrn_reg = 0;