dev/e1000/e1000_i210.c

57 	s32 ret_val;
61 	ret_val = e1000_acquire_swfw_sync(hw, E1000_SWFW_EEP_SM);
63 	return ret_val;
182 	s32 ret_val = E1000_SUCCESS;
193 		ret_val = -E1000_ERR_NVM;
198 		ret_val = -E1000_ERR_NVM;
209 				ret_val = E1000_SUCCESS;
215 		if (ret_val != E1000_SUCCESS) {
222 	return ret_val;
278 	s32 ret_val = E1000_SUCCESS;
285 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
286 		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
288 		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
290 		if (ret_val != E1000_SUCCESS)
294 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
295 		if (ret_val != E1000_SUCCESS) {
297 			ret_val = E1000_SUCCESS;
301 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
302 		if (ret_val != E1000_SUCCESS) {
304 			ret_val = E1000_SUCCESS;
308 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
309 		if (ret_val != E1000_SUCCESS) {
311 			ret_val = E1000_SUCCESS;
315 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
316 		if (ret_val != E1000_SUCCESS) {
318 			ret_val = E1000_SUCCESS;
322 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
323 		if (ret_val != E1000_SUCCESS) {
325 			ret_val = E1000_SUCCESS;
345 	return ret_val;
495 	s32 ret_val;
506 	ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);
507 	if (ret_val != E1000_SUCCESS) {
520 			ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);
521 			if (ret_val) {
529 		ret_val = e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
531 		if (ret_val != E1000_SUCCESS) {
539 		ret_val = e1000_update_flash_i210(hw);
541 		ret_val = E1000_ERR_SWFW_SYNC;
544 	return ret_val;
555 	bool ret_val = false;
562 		ret_val = true;
564 	return ret_val;
574 	s32 ret_val;
579 	ret_val = e1000_pool_flash_update_done_i210(hw);
580 	if (ret_val == -E1000_ERR_NVM) {
588 	ret_val = e1000_pool_flash_update_done_i210(hw);
589 	if (ret_val == E1000_SUCCESS)
595 	return ret_val;
605 	s32 ret_val = -E1000_ERR_NVM;
613 			ret_val = E1000_SUCCESS;
619 	return ret_val;
630 	s32 ret_val;
635 	ret_val = e1000_init_nvm_params_82575(hw);
652 	return ret_val;
677 	s32 ret_val;
681 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
682 	if (ret_val) {
699 	return ret_val;
711 	s32 ret_val;
725 	ret_val = e1000_read_invm_word_i210(hw, E1000_INVM_AUTOLOAD,
727 	if (ret_val != E1000_SUCCESS)
740 			ret_val = E1000_SUCCESS;
743 			ret_val = -E1000_ERR_PHY;
773 	return ret_val;
814 	s32 ret_val;
819 		ret_val = e1000_pll_workaround_i210(hw);
820 		if (ret_val != E1000_SUCCESS)
821 			return ret_val;
828 	ret_val = e1000_init_hw_base(hw);
829 	return ret_val;