dev/e1000/e1000_82541.c

47 static s32  e1000_init_phy_params_82541(struct e1000_hw *hw);
48 static s32  e1000_init_nvm_params_82541(struct e1000_hw *hw);
49 static s32  e1000_init_mac_params_82541(struct e1000_hw *hw);
50 static s32  e1000_reset_hw_82541(struct e1000_hw *hw);
51 static s32  e1000_init_hw_82541(struct e1000_hw *hw);
52 static s32  e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
54 static s32  e1000_phy_hw_reset_82541(struct e1000_hw *hw);
55 static s32  e1000_setup_copper_link_82541(struct e1000_hw *hw);
56 static s32  e1000_check_for_link_82541(struct e1000_hw *hw);
57 static s32  e1000_get_cable_length_igp_82541(struct e1000_hw *hw);
58 static s32  e1000_set_d3_lplu_state_82541(struct e1000_hw *hw,
60 static s32  e1000_setup_led_82541(struct e1000_hw *hw);
61 static s32  e1000_cleanup_led_82541(struct e1000_hw *hw);
62 static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw);
63 static s32  e1000_read_mac_addr_82541(struct e1000_hw *hw);
64 static s32  e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
66 static s32  e1000_phy_init_script_82541(struct e1000_hw *hw);
67 static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw);
84  *  @hw: pointer to the HW structure
86 static s32 e1000_init_phy_params_82541(struct e1000_hw *hw)
88 	struct e1000_phy_info *phy = &hw->phy;
111 	ret_val = e1000_get_phy_id(hw);
127  *  @hw: pointer to the HW structure
129 static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw)
131 	struct e1000_nvm_info *nvm = &hw->nvm;
133 	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
183 		ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size);
218  *  @hw: pointer to the HW structure
220 static s32 e1000_init_mac_params_82541(struct e1000_hw *hw)
222 	struct e1000_mac_info *mac = &hw->mac;
227 	hw->phy.media_type = e1000_media_type_copper;
243 	/* hw initialization */
278  *  @hw: pointer to the HW structure
282 void e1000_init_function_pointers_82541(struct e1000_hw *hw)
286 	hw->mac.ops.init_params = e1000_init_mac_params_82541;
287 	hw->nvm.ops.init_params = e1000_init_nvm_params_82541;
288 	hw->phy.ops.init_params = e1000_init_phy_params_82541;
293  *  @hw: pointer to the HW structure
297 static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
304 	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
306 	E1000_WRITE_REG(hw, E1000_RCTL, 0);
307 	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
308 	E1000_WRITE_FLUSH(hw);
316 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
319 	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
320 		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));
321 		E1000_WRITE_FLUSH(hw);
326 	switch (hw->mac.type) {
334 		E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
337 		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
345 	manc = E1000_READ_REG(hw, E1000_MANC);
347 	E1000_WRITE_REG(hw, E1000_MANC, manc);
349 	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
350 		e1000_phy_init_script_82541(hw);
353 		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
356 		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
361 	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
364 	E1000_READ_REG(hw, E1000_ICR);
371  *  @hw: pointer to the HW structure
375 static s32 e1000_init_hw_82541(struct e1000_hw *hw)
377 	struct e1000_mac_info *mac = &hw->mac;
378 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
385 	ret_val = mac->ops.id_led_init(hw);
392 	ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
399 	mac->ops.clear_vfta(hw);
402 	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
407 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
414 		E1000_WRITE_FLUSH(hw);
418 	ret_val = mac->ops.setup_link(hw);
420 	txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
423 	E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
431 	e1000_clear_hw_cntrs_82541(hw);
439  * @hw: pointer to the HW structure
445 static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
448 	struct e1000_phy_info *phy = &hw->phy;
454 	ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);
467 	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);
474 		ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);
493  *  @hw: pointer to the HW structure
500 static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw)
507 	ret_val = e1000_phy_hw_reset_generic(hw);
511 	e1000_phy_init_script_82541(hw);
513 	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
515 		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
518 		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
527  *  @hw: pointer to the HW structure
534 static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw)
536 	struct e1000_phy_info *phy = &hw->phy;
537 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
543 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
546 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
550 	if (hw->mac.type == e1000_82541 || hw->mac.type == e1000_82547) {
557 	ret_val = e1000_copper_link_setup_igp(hw);
561 	if (hw->mac.autoneg) {
567 	ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
570 	E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
572 	ret_val = e1000_setup_copper_link_generic(hw);
580  *  @hw: pointer to the HW structure
583  *  results in the hw->mac structure.
585 static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
587 	struct e1000_mac_info *mac = &hw->mac;
609 	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
614 		ret_val = e1000_config_dsp_after_link_change_82541(hw, false);
624 	e1000_check_downshift_generic(hw);
635 	ret_val = e1000_config_dsp_after_link_change_82541(hw, true);
642 	mac->ops.config_collision_dist(hw);
650 	ret_val = e1000_config_fc_after_link_up_generic(hw);
660  *  @hw: pointer to the HW structure
669 static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
672 	struct e1000_phy_info *phy = &hw->phy;
673 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
687 		ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
698 		ret_val = phy->ops.get_cable_length(hw);
706 				ret_val = phy->ops.read_reg(hw,
714 				ret_val = phy->ops.write_reg(hw,
730 		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
736 			ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS,
745 				ret_val = phy->ops.write_reg(hw,
763 			ret_val = phy->ops.read_reg(hw, 0x2F5B,
769 			ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
775 			ret_val = phy->ops.write_reg(hw, 0x0000,
780 				ret_val = phy->ops.read_reg(hw,
789 				ret_val = phy->ops.write_reg(hw,
796 			ret_val = phy->ops.write_reg(hw, 0x0000,
804 			ret_val = phy->ops.write_reg(hw, 0x2F5B,
821 		ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data);
826 		ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
832 		ret_val = phy->ops.write_reg(hw, 0x0000,
837 		ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_DSP_FFE,
842 		ret_val = phy->ops.write_reg(hw, 0x0000,
850 		ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);
864  *  @hw: pointer to the HW structure
873 static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw)
875 	struct e1000_phy_info *phy = &hw->phy;
889 		ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data);
934  *  @hw: pointer to the HW structure
946 static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw, bool active)
948 	struct e1000_phy_info *phy = &hw->phy;
954 	switch (hw->mac.type) {
959 		ret_val = e1000_set_d3_lplu_state_generic(hw, active);
964 	ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data);
970 		ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
981 			ret_val = phy->ops.read_reg(hw,
988 			ret_val = phy->ops.write_reg(hw,
994 			ret_val = phy->ops.read_reg(hw,
1001 			ret_val = phy->ops.write_reg(hw,
1011 		ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
1016 		ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1022 		ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1032  *  @hw: pointer to the HW structure
1037 static s32 e1000_setup_led_82541(struct e1000_hw *hw)
1039 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1044 	ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
1049 	ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1055 	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
1063  *  @hw: pointer to the HW structure
1068 static s32 e1000_cleanup_led_82541(struct e1000_hw *hw)
1070 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1075 	ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,
1080 	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
1088  *  @hw: pointer to the HW structure
1092 static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
1094 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1112 	ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data);
1115 	hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003);
1119 	hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
1123 	switch (hw->mac.type) {
1126 		hw->phy.ops.write_reg(hw, 0x1F95, 0x0001);
1128 		hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21);
1130 		hw->phy.ops.write_reg(hw, 0x1F79, 0x0018);
1132 		hw->phy.ops.write_reg(hw, 0x1F30, 0x1600);
1134 		hw->phy.ops.write_reg(hw, 0x1F31, 0x0014);
1136 		hw->phy.ops.write_reg(hw, 0x1F32, 0x161C);
1138 		hw->phy.ops.write_reg(hw, 0x1F94, 0x0003);
1140 		hw->phy.ops.write_reg(hw, 0x1F96, 0x003F);
1142 		hw->phy.ops.write_reg(hw, 0x2010, 0x0008);
1146 		hw->phy.ops.write_reg(hw, 0x1F73, 0x0099);
1152 	hw->phy.ops.write_reg(hw, 0x0000, 0x3300);
1157 	hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data);
1159 	if (hw->mac.type == e1000_82547) {
1163 		hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS,
1167 			hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS,
1184 			hw->phy.ops.write_reg(hw,
1187 			hw->phy.ops.write_reg(hw,
1199  *  @hw: pointer to the HW structure
1205 void e1000_init_script_state_82541(struct e1000_hw *hw, bool state)
1207 	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
1211 	if (hw->phy.type != e1000_phy_igp) {
1224  * @hw: pointer to the HW structure
1229 static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw)
1232 	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))
1233 		e1000_power_down_phy_copper(hw);
1240  *  @hw: pointer to the HW structure
1244 static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw)
1248 	e1000_clear_hw_cntrs_base_generic(hw);
1250 	E1000_READ_REG(hw, E1000_PRC64);
1251 	E1000_READ_REG(hw, E1000_PRC127);
1252 	E1000_READ_REG(hw, E1000_PRC255);
1253 	E1000_READ_REG(hw, E1000_PRC511);
1254 	E1000_READ_REG(hw, E1000_PRC1023);
1255 	E1000_READ_REG(hw, E1000_PRC1522);
1256 	E1000_READ_REG(hw, E1000_PTC64);
1257 	E1000_READ_REG(hw, E1000_PTC127);
1258 	E1000_READ_REG(hw, E1000_PTC255);
1259 	E1000_READ_REG(hw, E1000_PTC511);
1260 	E1000_READ_REG(hw, E1000_PTC1023);
1261 	E1000_READ_REG(hw, E1000_PTC1522);
1263 	E1000_READ_REG(hw, E1000_ALGNERRC);
1264 	E1000_READ_REG(hw, E1000_RXERRC);
1265 	E1000_READ_REG(hw, E1000_TNCRS);
1266 	E1000_READ_REG(hw, E1000_CEXTERR);
1267 	E1000_READ_REG(hw, E1000_TSCTC);
1268 	E1000_READ_REG(hw, E1000_TSCTFC);
1270 	E1000_READ_REG(hw, E1000_MGTPRC);
1271 	E1000_READ_REG(hw, E1000_MGTPDC);
1272 	E1000_READ_REG(hw, E1000_MGTPTC);
1277  *  @hw: pointer to the HW structure
1281 static s32 e1000_read_mac_addr_82541(struct e1000_hw *hw)
1290 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1295 		hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);
1296 		hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);
1300 		hw->mac.addr[i] = hw->mac.perm_addr[i];