dev/e1000/e1000_82540.c

70 	s32 ret_val;
90 	ret_val = e1000_get_phy_id(hw);
91 	if (ret_val)
105 		ret_val = -E1000_ERR_PHY;
111 	return ret_val;
162 	s32 ret_val = E1000_SUCCESS;
217 		ret_val = -E1000_ERR_CONFIG;
247 	return ret_val;
274 	s32 ret_val = E1000_SUCCESS;
320 	return ret_val;
333 	s32 ret_val;
339 	ret_val = mac->ops.id_led_init(hw);
340 	if (ret_val) {
374 	ret_val = mac->ops.setup_link(hw);
400 	return ret_val;
415 	s32 ret_val;
425 	ret_val = e1000_set_phy_mode_82540(hw);
426 	if (ret_val)
431 		ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,
433 		if (ret_val)
436 		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,
438 		if (ret_val)
442 	ret_val = e1000_copper_link_setup_m88(hw);
443 	if (ret_val)
446 	ret_val = e1000_setup_copper_link_generic(hw);
449 	return ret_val;
464 	s32 ret_val = E1000_SUCCESS;
476 			ret_val = e1000_adjust_serdes_amplitude_82540(hw);
477 			if (ret_val)
481 		ret_val = e1000_set_vco_speed_82540(hw);
482 		if (ret_val)
488 	ret_val = e1000_setup_fiber_serdes_link_generic(hw);
491 	return ret_val;
502 	s32 ret_val;
507 	ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
508 	if (ret_val)
514 		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL,
516 		if (ret_val)
521 	return ret_val;
532 	s32  ret_val;
540 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT,
542 	if (ret_val)
545 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
546 	if (ret_val)
549 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
550 	if (ret_val)
554 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
555 	if (ret_val)
560 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
561 	if (ret_val)
564 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
565 	if (ret_val)
569 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
570 	if (ret_val)
573 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
577 	return ret_val;
591 	s32 ret_val = E1000_SUCCESS;
599 	ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
600 	if (ret_val) {
601 		ret_val = -E1000_ERR_PHY;
606 		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
608 		if (ret_val) {
609 			ret_val = -E1000_ERR_PHY;
612 		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL,
614 		if (ret_val) {
615 			ret_val = -E1000_ERR_PHY;
622 	return ret_val;
694 	s32  ret_val = E1000_SUCCESS;
701 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
702 		if (ret_val) {
718 	return ret_val;