dev/bge/if_bge.c

55  * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus.
642 	uint32_t bit, regbase;
657 			bit = BGE_APE_LOCK_GRANT_DRIVER0;
661 				bit = BGE_APE_LOCK_GRANT_DRIVER0;
663 				bit = (1 << sc->bge_func_addr);
665 		APE_WRITE_4(sc, regbase + 4 * i, bit);
738 	uint32_t bit, gnt, req, status;
761 			bit = BGE_APE_LOCK_REQ_DRIVER0;
763 			bit = (1 << sc->bge_func_addr);
768 			bit = BGE_APE_LOCK_REQ_DRIVER0;
770 			bit = (1 << sc->bge_func_addr);
775 			bit = BGE_APE_LOCK_REQ_DRIVER0;
777 			bit = (1 << sc->bge_func_addr);
784 		bit = BGE_APE_LOCK_REQ_DRIVER0;
791 	APE_WRITE_4(sc, req + off, bit);
796 		if (status == bit)
802 	if (status != bit) {
805 		    locknum, req + off, bit & 0xFFFF, gnt + off,
808 		APE_WRITE_4(sc, gnt + off, bit);
818 	uint32_t bit, gnt;
836 			bit = BGE_APE_LOCK_GRANT_DRIVER0;
838 			bit = (1 << sc->bge_func_addr);
842 			bit = BGE_APE_LOCK_GRANT_DRIVER0;
844 			bit = (1 << sc->bge_func_addr);
848 			bit = BGE_APE_LOCK_GRANT_DRIVER0;
850 			bit = (1 << sc->bge_func_addr);
856 		bit = BGE_APE_LOCK_GRANT_DRIVER0;
862 	APE_WRITE_4(sc, gnt + off, bit);
1115 	/* Clear the autopoll bit if set, otherwise may trigger PCI errors. */
1143 	/* Restore the autopoll bit if necessary. */
1172 	/* Clear the autopoll bit if set, otherwise may trigger PCI errors. */
1191 	/* Restore the autopoll bit if necessary. */
1890 	 * 64-bit DMA reads, which can be terminated early and then
1891 	 * completed later as 32-bit accesses, in combination with
2113 	 * block.  We set the 'ring disabled' bit in the
2198 	 * Disable all send rings by setting the 'ring disabled' bit
2237 	 * 'ring diabled' bit in the flags field of all the receive
2916 		 * address space to 32bit and try again.
2923 			    "limit DMA address space to 32bit for %s\n", msg);
3300 			printf("%u MHz; 32bit\n", clk);
3302 			printf("%u MHz; 64bit\n", clk);
3602 		 * (This bit is not valid on PCI Express controllers.)
3612 	 * The 40bit DMA bug applies to the 5714/5715 controllers and is
3614 	 * PCIe to PCI-X bridge in the device. Use 40bit DMA workaround.
4907 	 * BGE_HCCMODE_ATTN bit of BGE_HCC_MODE,
4908 	 * BGE_BMANMODE_LOMBUF_ATTN bit of BGE_BMAN_MODE and
4909 	 * BGE_MODECTL_FLOWCTL_ATTN_INTR bit of BGE_MODE_CTL.
5149 	/* Calculate header length, incl. TCP/IP options, in 32 bit units. */
5965 bge_stop_block(struct bge_softc *sc, bus_size_t reg, uint32_t bit)
5969 	BGE_CLRBIT(sc, reg, bit);
5972 		if ((CSR_READ_4(sc, reg) & bit) == 0)
6208 		 * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit