Lines Matching defs:regs
16 void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic )
24 INREG( regs, RADEON_CLOCK_CNTL_DATA);
25 INREG( regs, RADEON_CRTC_GEN_CNTL);
28 void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic )
50 save = INREG( regs, RADEON_CLOCK_CNTL_INDEX );
52 OUTREG( regs, RADEON_CLOCK_CNTL_INDEX, tmp );
53 tmp = INREG( regs, RADEON_CLOCK_CNTL_DATA );
54 OUTREG( regs, RADEON_CLOCK_CNTL_INDEX, save );
59 uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr )
63 OUTREG8( regs, RADEON_CLOCK_CNTL_INDEX, addr & 0x3f );
64 RADEONPllErrataAfterIndex(regs, asic);
65 res = INREG( regs, RADEON_CLOCK_CNTL_DATA );
66 RADEONPllErrataAfterData(regs, asic);
71 void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val )
75 OUTREG8( regs, RADEON_CLOCK_CNTL_INDEX, ((addr & 0x3f ) |
77 RADEONPllErrataAfterIndex(regs, asic);
78 OUTREG( regs, RADEON_CLOCK_CNTL_DATA, val );
79 RADEONPllErrataAfterData(regs, asic);
84 void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr,
87 uint32 tmp = Radeon_INPLL( regs, asic, addr );
90 Radeon_OUTPLL( regs, asic, addr, tmp );