dvb/cx23882/i2c_core.c

37 static status_t i2c_writebyte(i2c_bus *bus, uint8 byte, int *ack);
38 static status_t i2c_readbyte(i2c_bus *bus, uint8 *pbyte);
39 static status_t i2c_read_unlocked(i2c_bus *bus, int address, void *data, int size);
40 static status_t i2c_write_unlocked(i2c_bus *bus, int address, const void *data, int size);
65 	i2c_bus *bus = malloc(sizeof(i2c_bus));
66 	if (!bus)
69 	bus->sem = create_sem(1, "i2c bus access");
70 	if (bus->sem < 0) {
71 		free(bus);
75 	bus->cookie = cookie;
76 	bus->delay = 1000000 / frequency;
77 	if (bus->delay == 0)
78 		bus->delay = 1;
79 	bus->timeout = timeout;
80 	bus->set_scl = set_scl;
81 	bus->set_sda = set_sda;
82 	bus->get_scl = get_scl;
83 	bus->get_sda = get_sda;
88 	return bus;
93 i2c_delete_bus(i2c_bus *bus)
95 	if (!bus)
97 	delete_sem(bus->sem);
98 	free(bus);
103 set_sda_low(i2c_bus *bus)
105 	bus->set_sda(bus->cookie, 0);
106 	snooze(bus->delay);
111 set_sda_high(i2c_bus *bus)
113 	bus->set_sda(bus->cookie, 1);
114 	snooze(bus->delay);
119 set_scl_low(i2c_bus *bus)
121 	bus->set_scl(bus->cookie, 0);
122 	snooze(bus->delay);
127 set_scl_high(i2c_bus *bus)
129 	bigtime_t end = system_time() + bus->timeout;
130 	bus->set_scl(bus->cookie, 1);
131 	while (0 == bus->get_scl(bus->cookie)) {
136 	snooze(bus->delay);
142 i2c_start(i2c_bus *bus)
144 	set_sda_low(bus);
145 	set_scl_low(bus);
150 i2c_stop(i2c_bus *bus)
152 	set_sda_low(bus);
153 	set_scl_high(bus);
154 	set_sda_high(bus);
159 i2c_start_address(i2c_bus *bus, int address, int read /* 1 = read, 0 = write */)
170 		i2c_start(bus);
171 		res = i2c_writebyte(bus, addr, &ack);
179 		i2c_stop(bus);
195 i2c_writebyte(i2c_bus *bus, uint8 byte, int *ack)
205 				set_sda_high(bus);
207 				set_sda_low(bus);
209 		if (set_scl_high(bus) != B_OK) {
210 			set_sda_high(bus); // avoid blocking the bus
215 			if (bit == 1 && 0 == bus->get_sda(bus->cookie)) {
220 		set_scl_low(bus);
222 	set_sda_high(bus);
223 	if (set_scl_high(bus) != B_OK) {
227 	*ack = 0 == bus->get_sda(bus->cookie);
228 	set_scl_low(bus);
237 i2c_readbyte(i2c_bus *bus, uint8 *pbyte)
242 	set_sda_high(bus);
245 		if (set_scl_high(bus) != B_OK) {
249 		byte = (byte << 1) | bus->get_sda(bus->cookie);
250 		set_scl_low(bus);
258 i2c_read_unlocked(i2c_bus *bus, int address, void *data, int size)
266 	status = i2c_start_address(bus, address, 1 /* 1 = read, 0 = write */);
274 		if (i2c_readbyte(bus, bytes) != B_OK) { // timeout
279 			set_sda_low(bus); // ack
281 			set_sda_high(bus); // nack
283 		if (set_scl_high(bus) != B_OK) {
284 			set_sda_high(bus); // avoid blocking the bus
288 		set_scl_low(bus);
289 		set_sda_high(bus);
295 	i2c_stop(bus);
302 i2c_write_unlocked(i2c_bus *bus, int address, const void *data, int size)
311 	status = i2c_start_address(bus, address, 0 /* 1 = read, 0 = write */);
319 		status = i2c_writebyte(bus, *bytes, &ack);
335 	i2c_stop(bus);
345 i2c_read(i2c_bus *bus, int address, void *data, int size)
348 	acquire_sem(bus->sem);
349 	res = i2c_read_unlocked(bus, address, data, size);
350 	release_sem(bus->sem);
356 i2c_write(i2c_bus *bus, int address, const void *data, int size)
359 	acquire_sem(bus->sem);
360 	res = i2c_write_unlocked(bus, address, data, size);
361 	release_sem(bus->sem);
367 i2c_xfer(i2c_bus *bus, int address,
373 	acquire_sem(bus->sem);
376 		res = i2c_write_unlocked(bus, address, write_data, write_size);
378 			release_sem(bus->sem);
384 		res = i2c_read_unlocked(bus, address, read_data, read_size);
386 			release_sem(bus->sem);
391 	release_sem(bus->sem);