bus_managers/pci/pci.cpp

44 pci_read_config(uint8 virtualBus, uint8 device, uint8 function, uint16 offset,
54 	if (gPCI->ReadConfig(domain, bus, device, function, offset, size,
63 pci_write_config(uint8 virtualBus, uint8 device, uint8 function, uint16 offset,
71 	gPCI->WriteConfig(domain, bus, device, function, offset, size, value);
93 pci_find_capability(uint8 virtualBus, uint8 device, uint8 function,
101 	return gPCI->FindCapability(domain, bus, device, function, capID, offset);
106 pci_find_extended_capability(uint8 virtualBus, uint8 device, uint8 function,
114 	return gPCI->FindExtendedCapability(domain, bus, device, function, capID,
120 pci_reserve_device(uchar virtualBus, uchar device, uchar function,
126 	TRACE(("pci_reserve_device(%d, %d, %d, %s)\n", virtualBus, device, function,
139 	//	domain, bus, device, function, driverName, nodeCookie));
149 		{B_PCI_DEVICE_FUNCTION, B_UINT8_TYPE, {.ui8 = function}},
206 pci_unreserve_device(uchar virtualBus, uchar device, uchar function,
213 		function, driverName));
219 	//	domain, bus, device, function, driverName, nodeCookie));
229 		{B_PCI_DEVICE_FUNCTION, B_UINT8_TYPE, {.ui8 = function}},
290 pci_update_interrupt_line(uchar virtualBus, uchar device, uchar function,
298 	return gPCI->UpdateInterruptLine(domain, bus, device, function,
304 pci_get_powerstate(uchar virtualBus, uint8 device, uint8 function, uint8* state)
311 	return gPCI->GetPowerstate(domain, bus, device, function, state);
316 pci_set_powerstate(uchar virtualBus, uint8 device, uint8 function, uint8 newState)
323 	return gPCI->SetPowerstate(domain, bus, device, function, newState);
808 		for (int function = 0; function < numFunctions; function++) {
809 			uint16 device_id = ReadConfig(domain, bus, dev, function,
814 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
816 			uint8 subClass = ReadConfig(domain, bus, dev, function,
822 			uint8 headerType = ReadConfig(domain, bus, dev, function,
828 				domain, bus, dev, function));
832 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
833 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
834 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
835 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
839 			pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
842 			WriteConfig(domain, bus, dev, function, PCI_command, 2, pcicmd);
845 			WriteConfig(domain, bus, dev, function, PCI_primary_bus, 1, 0);
846 			WriteConfig(domain, bus, dev, function, PCI_secondary_bus, 1, 0);
847 			WriteConfig(domain, bus, dev, function, PCI_subordinate_bus, 1, 0);
852 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
853 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
854 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
855 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
868 		for (int function = 0; function < numFunctions; function++) {
869 			uint16 deviceID = ReadConfig(domain, bus, dev, function,
874 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
876 			uint8 subClass = ReadConfig(domain, bus, dev, function,
882 			uint8 headerType = ReadConfig(domain, bus, dev, function,
888 				domain, bus, dev, function));
891 			WriteConfig(domain, bus, dev, function, PCI_primary_bus, 1, bus);
892 			WriteConfig(domain, bus, dev, function, PCI_secondary_bus, 1,
894 			WriteConfig(domain, bus, dev, function, PCI_subordinate_bus, 1, 255);
898 			pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
900 			WriteConfig(domain, bus, dev, function, PCI_command, 2, pcicmd);
905 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
906 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
907 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
908 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
914 			WriteConfig(domain, bus, dev, function, PCI_subordinate_bus, 1, lastUsedBusNumber);
919 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
920 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
921 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
922 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
954 		for (int function = 0; function < numFunctions; function++) {
955 			uint16 deviceId = ReadConfig(domain, bus, dev, function,
960 			pci_fixup_device(this, domain, bus, dev, function);
962 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
966 			uint8 subClass = ReadConfig(domain, bus, dev, function,
973 			uint8 headerType = ReadConfig(domain, bus, dev, function,
978 					domain, bus, dev, function, headerType);
983 			int busBehindBridge = ReadConfig(domain, bus, dev, function,
1004 				dev->device, dev->function, PCI_bridge_control, 2);
1016 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1019 				dev->function, PCI_bridge_control, 2);
1022 				dev->device, dev->function, bridgeControlOld,
1038 			dev->function, PCI_status, 2);
1039 		WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1043 				"0x%04x\n", dev->domain, dev->bus, dev->device, dev->function,
1063 				dev->device, dev->function, PCI_secondary_status, 2);
1064 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1069 					dev->device, dev->function, secondaryStatus);
1086 				dev->device, dev->function, PCI_bridge_control, 2);
1087 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1092 					dev->function, bridgeControl);
1128 		for (int function = 0; function < numFunctions; function++)
1129 			_DiscoverDevice(bus, dev, function);
1137 PCI::_DiscoverDevice(PCIBus *bus, uint8 dev, uint8 function)
1139 	FLOW("PCI: DiscoverDevice, domain %u, bus %u, dev %u, func %u\n", bus->domain, bus->bus, dev, function);
1141 	uint16 deviceID = ReadConfig(bus->domain, bus->bus, dev, function,
1146 	PCIDev *newDev = _CreateDevice(bus, dev, function);
1148 	uint8 baseClass = ReadConfig(bus->domain, bus->bus, dev, function,
1150 	uint8 subClass = ReadConfig(bus->domain, bus->bus, dev, function,
1152 	uint8 headerType = ReadConfig(bus->domain, bus->bus, dev, function,
1156 		uint8 secondaryBus = ReadConfig(bus->domain, bus->bus, dev, function,
1184 PCI::_CreateDevice(PCIBus *parent, uint8 device, uint8 function)
1187 		parent->bus, device, function);
1199 	newDev->function = function;
1242 		dev->function, offset, 4);
1243 	WriteConfig(dev->domain, dev->bus, dev->device, dev->function, offset, 4,
1245 	uint64 size = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1247 	WriteConfig(dev->domain, dev->bus, dev->device, dev->function, offset, 4,
1259 				dev->device, dev->function, offset + 4, 4);
1260 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1263 				dev->function, offset + 4, 4);
1264 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1301 	uint32 oldValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1303 	WriteConfig(dev->domain, dev->bus, dev->device, dev->function, offset, 4,
1305 	uint32 newValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1307 	WriteConfig(dev->domain, dev->bus, dev->device, dev->function, offset, 4,
1329 		dev->function, PCI_vendor_id, 2);
1331 		dev->function, PCI_device_id, 2);
1334 	dev->info.function = dev->function;
1336 		dev->function, PCI_revision, 1);
1338 		dev->function, PCI_class_api, 1);
1340 		dev->function, PCI_class_sub, 1);
1342 		dev->function, PCI_class_base, 1);
1344 		dev->function, PCI_line_size, 1);
1346 		dev->function, PCI_latency, 1);
1350 		dev->function, PCI_header_type, 1);
1352 		dev->function, PCI_bist, 1);
1366 				dev->function, PCI_command, 2);
1367 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1386 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1393 				dev->device, dev->function, PCI_cardbus_cis, 4);
1395 				dev->device, dev->function, PCI_subsystem_id, 2);
1397 				dev->bus, dev->device, dev->function, PCI_subsystem_vendor_id,
1400 				dev->device, dev->function, PCI_interrupt_line, 1);
1402 				dev->device, dev->function, PCI_interrupt_pin, 1);
1404 				dev->device, dev->function, PCI_min_grant, 1);
1406 				dev->device, dev->function, PCI_max_latency, 1);
1415 				dev->function, PCI_command, 2);
1416 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1434 			WriteConfig(dev->domain, dev->bus, dev->device, dev->function,
1441 				dev->device, dev->function, PCI_primary_bus, 1);
1443 				dev->device, dev->function, PCI_secondary_bus, 1);
1445 				dev->bus, dev->device, dev->function, PCI_subordinate_bus, 1);
1447 				dev->bus, dev->device, dev->function, PCI_secondary_latency, 1);
1449 				dev->device, dev->function, PCI_io_base, 1);
1451 				dev->device, dev->function, PCI_io_limit, 1);
1453 				dev->bus, dev->device, dev->function, PCI_secondary_status, 2);
1455 				dev->device, dev->function, PCI_memory_base, 2);
1457 				dev->device, dev->function, PCI_memory_limit, 2);
1459 				dev->bus, dev->device, dev->function,
1462 				dev->domain, dev->bus, dev->device, dev->function,
1465 				dev->domain, dev->bus, dev->device, dev->function,
1468 				dev->domain, dev->bus, dev->device, dev->function,
1471 				dev->bus, dev->device, dev->function, PCI_io_base_upper16, 2);
1473 				dev->bus, dev->device, dev->function, PCI_io_limit_upper16, 2);
1475 				dev->device, dev->function, PCI_interrupt_line, 1);
1477 				dev->device, dev->function, PCI_interrupt_pin, 1);
1479 				dev->device, dev->function, PCI_bridge_control, 2);
1481 				dev->device, dev->function, PCI_sub_device_id_1, 2);
1483 				dev->bus, dev->device, dev->function, PCI_sub_vendor_id_1, 2);
1491 				dev->device, dev->function, PCI_sub_device_id_2, 2);
1493 				dev->bus, dev->device, dev->function, PCI_sub_vendor_id_2, 2);
1495 				dev->device, dev->function, PCI_primary_bus_2, 1);
1497 				dev->device, dev->function, PCI_secondary_bus_2, 1);
1499 				dev->bus, dev->device, dev->function, PCI_subordinate_bus_2, 1);
1501 				dev->bus, dev->device, dev->function, PCI_secondary_latency_2, 1);
1504 				dev->device, dev->function, PCI_memory_base0_2, 4);
1506 				dev->device, dev->function, PCI_memory_limit0_2, 4);
1508 				dev->bus, dev->device, dev->function, PCI_memory_base1_2, 4);
1510 				dev->bus, dev->device, dev->function, PCI_memory_limit1_2, 4);
1512 				dev->device, dev->function, PCI_io_base0_2, 4);
1514 				dev->device, dev->function, PCI_io_limit0_2, 4);
1516 				dev->bus, dev->device, dev->function, PCI_io_base1_2, 4);
1518 				dev->bus, dev->device, dev->function, PCI_io_limit1_2, 4);
1520 				dev->bus, dev->device, dev->function, PCI_secondary_status_2, 2);
1522 				dev->bus, dev->device, dev->function, PCI_bridge_control_2, 2);
1557 PCI::ReadConfig(uint8 domain, uint8 bus, uint8 device, uint8 function,
1565 		|| function > 7
1569 		dprintf("PCI: can't read config for domain %d, bus %u, device %u, function %u, offset %u, size %u\n",
1570 			 domain, bus, device, function, offset, size);
1575 		device, function, offset, size, value);
1580 PCI::ReadConfig(uint8 domain, uint8 bus, uint8 device, uint8 function,
1584 	if (ReadConfig(domain, bus, device, function, offset, size, &value)
1597 			device->function, offset, size, &value) != B_OK)
1605 PCI::WriteConfig(uint8 domain, uint8 bus, uint8 device, uint8 function,
1613 		|| function > 7
1617 		dprintf("PCI: can't write config for domain %d, bus %u, device %u, function %u, offset %u, size %u\n",
1618 			 domain, bus, device, function, offset, size);
1623 		device, function, offset, size, value);
1631 		device->function, offset, size, value);
1636 PCI::FindCapability(uint8 domain, uint8 bus, uint8 device, uint8 function,
1639 	uint16 status = ReadConfig(domain, bus, device, function, PCI_status, 2);
1642 			"not supported\n", bus, device, function, capID);
1646 	uint8 headerType = ReadConfig(domain, bus, device, function,
1660 				"%#02x unknown header type\n", bus, device, function, capID);
1664 	capPointer = ReadConfig(domain, bus, device, function, capPointer, 1);
1668 			"empty list\n", bus, device, function, capID);
1673 		if (ReadConfig(domain, bus, device, function, capPointer, 1) == capID) {
1679 		capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
1687 	TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x circular list\n", bus, device, function, capID);
1696 		device->function, capID, offset);
1702 	uint8 function, uint16 capID, uint16 *offset)
1704 	if (FindCapability(domain, bus, device, function, PCI_cap_id_pcie)
1707 			"not supported\n", bus, device, function, capID);
1711 	uint32 capability = ReadConfig(domain, bus, device, function,
1727 		capability = ReadConfig(domain, bus, device, function,
1732 		"circular list\n", bus, device, function, capID);
1741 		device->function, capID, offset);
1747 	uint8 function, uint16 capID, uint8 *offset)
1753 		capPointer = ReadConfig(domain, bus, device, function, *offset + 1,
1755 	} else if (FindCapability(domain, bus, device, function, PCI_cap_id_ht,
1758 			"not supported\n", bus, device, function, capID);
1770 		uint8 capability = ReadConfig(domain, bus, device, function,
1773 			if ((ReadConfig(domain, bus, device, function,
1781 		capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
1786 		"circular list\n", bus, device, function, capID);
1795 		device->function, capID, offset);
1800 PCI::FindDevice(uint8 domain, uint8 bus, uint8 device, uint8 function)
1805 	return _FindDevice(fDomainData[domain].bus, domain, bus, device, function);
1811 	uint8 function)
1819 				&& child->function == function)
1825 					function);
1837 PCI::UpdateInterruptLine(uint8 domain, uint8 bus, uint8 _device, uint8 function,
1840 	PCIDev *device = FindDevice(domain, bus, _device, function);
1893 PCI::GetPowerstate(uint8 domain, uint8 bus, uint8 _device, uint8 function,
1896 	PCIDev *device = FindDevice(domain, bus, _device, function);
1906 PCI::SetPowerstate(uint8 domain, uint8 bus, uint8 _device, uint8 function,
1909 	PCIDev *device = FindDevice(domain, bus, _device, function);
2241 		device->device, device->function, PCI_cap_id_msi,
2248 		device->device, device->function,
2267 		device->device, device->function, PCI_cap_id_msix,
2274 		device->device, device->function,
2284 		device->device, device->function,
2287 		device->device, device->function,