bus_managers/pci/pci.cpp

54 	if (gPCI->ReadConfig(domain, bus, device, function, offset, size,
752 	uint8 type = ReadConfig(domain, bus, device,
803 		uint16 vendor_id = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
809 			uint16 device_id = ReadConfig(domain, bus, dev, function,
814 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
816 			uint8 subClass = ReadConfig(domain, bus, dev, function,
822 			uint8 headerType = ReadConfig(domain, bus, dev, function,
832 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
833 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
834 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
835 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
839 			pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
852 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
853 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
854 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
855 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
863 		uint16 vendor_id = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
869 			uint16 deviceID = ReadConfig(domain, bus, dev, function,
874 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
876 			uint8 subClass = ReadConfig(domain, bus, dev, function,
882 			uint8 headerType = ReadConfig(domain, bus, dev, function,
898 			pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
905 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
906 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
907 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
908 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
919 				ReadConfig(domain, bus, dev, function, PCI_command, 2),
920 				ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
921 				ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
922 				ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
949 		uint16 vendorId = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
955 			uint16 deviceId = ReadConfig(domain, bus, dev, function,
962 			uint8 baseClass = ReadConfig(domain, bus, dev, function,
966 			uint8 subClass = ReadConfig(domain, bus, dev, function,
973 			uint8 headerType = ReadConfig(domain, bus, dev, function,
983 			int busBehindBridge = ReadConfig(domain, bus, dev, function,
1003 			uint16 bridgeControlOld = ReadConfig(dev->domain, dev->bus,
1018 			bridgeControlNew = ReadConfig(dev->domain, dev->bus, dev->device,
1037 		uint16 status = ReadConfig(dev->domain, dev->bus, dev->device,
1062 			uint16 secondaryStatus = ReadConfig(dev->domain, dev->bus,
1085 			uint16 bridgeControl = ReadConfig(dev->domain, dev->bus,
1122 		uint16 vendorID = ReadConfig(bus->domain, bus->bus, dev, 0,
1141 	uint16 deviceID = ReadConfig(bus->domain, bus->bus, dev, function,
1148 	uint8 baseClass = ReadConfig(bus->domain, bus->bus, dev, function,
1150 	uint8 subClass = ReadConfig(bus->domain, bus->bus, dev, function,
1152 	uint8 headerType = ReadConfig(bus->domain, bus->bus, dev, function,
1156 		uint8 secondaryBus = ReadConfig(bus->domain, bus->bus, dev, function,
1241 	uint64 pciAddress = ReadConfig(dev->domain, dev->bus, dev->device,
1245 	uint64 size = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1258 			uint64 highPCIAddress = ReadConfig(dev->domain, dev->bus,
1262 			uint64 highSize = ReadConfig(dev->domain, dev->bus, dev->device,
1301 	uint32 oldValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1305 	uint32 newValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
1328 	dev->info.vendor_id = ReadConfig(dev->domain, dev->bus, dev->device,
1330 	dev->info.device_id = ReadConfig(dev->domain, dev->bus, dev->device,
1335 	dev->info.revision = ReadConfig(dev->domain, dev->bus, dev->device,
1337 	dev->info.class_api = ReadConfig(dev->domain, dev->bus, dev->device,
1339 	dev->info.class_sub = ReadConfig(dev->domain, dev->bus, dev->device,
1341 	dev->info.class_base = ReadConfig(dev->domain, dev->bus, dev->device,
1343 	dev->info.line_size = ReadConfig(dev->domain, dev->bus, dev->device,
1345 	dev->info.latency = ReadConfig(dev->domain, dev->bus, dev->device,
1349 	dev->info.header_type = ReadConfig(dev->domain, dev->bus, dev->device,
1351 	dev->info.bist = ReadConfig(dev->domain, dev->bus, dev->device,
1365 			uint16 pcicmd = ReadConfig(dev->domain, dev->bus, dev->device,
1392 			dev->info.u.h0.cardbus_cis = ReadConfig(dev->domain, dev->bus,
1394 			dev->info.u.h0.subsystem_id = ReadConfig(dev->domain, dev->bus,
1396 			dev->info.u.h0.subsystem_vendor_id = ReadConfig(dev->domain,
1399 			dev->info.u.h0.interrupt_line = ReadConfig(dev->domain, dev->bus,
1401 			dev->info.u.h0.interrupt_pin = ReadConfig(dev->domain, dev->bus,
1403 			dev->info.u.h0.min_grant = ReadConfig(dev->domain, dev->bus,
1405 			dev->info.u.h0.max_latency = ReadConfig(dev->domain, dev->bus,
1414 			uint16 pcicmd = ReadConfig(dev->domain, dev->bus, dev->device,
1440 			dev->info.u.h1.primary_bus = ReadConfig(dev->domain, dev->bus,
1442 			dev->info.u.h1.secondary_bus = ReadConfig(dev->domain, dev->bus,
1444 			dev->info.u.h1.subordinate_bus = ReadConfig(dev->domain,
1446 			dev->info.u.h1.secondary_latency = ReadConfig(dev->domain,
1448 			dev->info.u.h1.io_base = ReadConfig(dev->domain, dev->bus,
1450 			dev->info.u.h1.io_limit = ReadConfig(dev->domain, dev->bus,
1452 			dev->info.u.h1.secondary_status = ReadConfig(dev->domain,
1454 			dev->info.u.h1.memory_base = ReadConfig(dev->domain, dev->bus,
1456 			dev->info.u.h1.memory_limit = ReadConfig(dev->domain, dev->bus,
1458 			dev->info.u.h1.prefetchable_memory_base = ReadConfig(dev->domain,
1461 			dev->info.u.h1.prefetchable_memory_limit = ReadConfig(
1464 			dev->info.u.h1.prefetchable_memory_base_upper32 = ReadConfig(
1467 			dev->info.u.h1.prefetchable_memory_limit_upper32 = ReadConfig(
1470 			dev->info.u.h1.io_base_upper16 = ReadConfig(dev->domain,
1472 			dev->info.u.h1.io_limit_upper16 = ReadConfig(dev->domain,
1474 			dev->info.u.h1.interrupt_line = ReadConfig(dev->domain, dev->bus,
1476 			dev->info.u.h1.interrupt_pin = ReadConfig(dev->domain, dev->bus,
1478 			dev->info.u.h1.bridge_control = ReadConfig(dev->domain, dev->bus,
1480 			dev->info.u.h1.subsystem_id = ReadConfig(dev->domain, dev->bus,
1482 			dev->info.u.h1.subsystem_vendor_id = ReadConfig(dev->domain,
1490 			dev->info.u.h2.subsystem_id = ReadConfig(dev->domain, dev->bus,
1492 			dev->info.u.h2.subsystem_vendor_id = ReadConfig(dev->domain,
1494 			dev->info.u.h2.primary_bus = ReadConfig(dev->domain, dev->bus,
1496 			dev->info.u.h2.secondary_bus = ReadConfig(dev->domain, dev->bus,
1498 			dev->info.u.h2.subordinate_bus = ReadConfig(dev->domain,
1500 			dev->info.u.h2.secondary_latency = ReadConfig(dev->domain,
1503 			dev->info.u.h2.memory_base = ReadConfig(dev->domain, dev->bus,
1505 			dev->info.u.h2.memory_limit = ReadConfig(dev->domain, dev->bus,
1507 			dev->info.u.h2.memory_base_upper32 = ReadConfig(dev->domain,
1509 			dev->info.u.h2.memory_limit_upper32 = ReadConfig(dev->domain,
1511 			dev->info.u.h2.io_base = ReadConfig(dev->domain, dev->bus,
1513 			dev->info.u.h2.io_limit = ReadConfig(dev->domain, dev->bus,
1515 			dev->info.u.h2.io_base_upper32 = ReadConfig(dev->domain,
1517 			dev->info.u.h2.io_limit_upper32 = ReadConfig(dev->domain,
1519 			dev->info.u.h2.secondary_status = ReadConfig(dev->domain,
1521 			dev->info.u.h2.bridge_control = ReadConfig(dev->domain,
1557 PCI::ReadConfig(uint8 domain, uint8 bus, uint8 device, uint8 function,
1580 PCI::ReadConfig(uint8 domain, uint8 bus, uint8 device, uint8 function,
1584 	if (ReadConfig(domain, bus, device, function, offset, size, &value)
1593 PCI::ReadConfig(PCIDev *device, uint16 offset, uint8 size)
1596 	if (ReadConfig(device->domain, device->bus, device->device,
1639 	uint16 status = ReadConfig(domain, bus, device, function, PCI_status, 2);
1646 	uint8 headerType = ReadConfig(domain, bus, device, function,
1664 	capPointer = ReadConfig(domain, bus, device, function, capPointer, 1);
1673 		if (ReadConfig(domain, bus, device, function, capPointer, 1) == capID) {
1679 		capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
1711 	uint32 capability = ReadConfig(domain, bus, device, function,
1727 		capability = ReadConfig(domain, bus, device, function,
1753 		capPointer = ReadConfig(domain, bus, device, function, *offset + 1,
1770 		uint8 capability = ReadConfig(domain, bus, device, function,
1773 			if ((ReadConfig(domain, bus, device, function,
1781 		capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
1868 		uint32 state = ReadConfig(device, capabilityOffset + PCI_pm_status, 2);
1881 		uint32 state = ReadConfig(device, capabilityOffset + PCI_pm_status, 2);
2027 		ReadConfig(device, PCI_command, 2) | PCI_command_int_disable);
2038 		ReadConfig(device, info->capability_offset + PCI_msi_control, 2));
2159 		ReadConfig(device, PCI_command, 2) | PCI_command_memory);
2193 		ReadConfig(device, PCI_command, 2) | PCI_command_int_disable);
2204 		ReadConfig(device, info->capability_offset + PCI_msix_control, 2));
2247 	info->control_value = ReadConfig(device->domain, device->bus,
2273 	info->control_value = ReadConfig(device->domain, device->bus,
2283 	uint32 table_value = ReadConfig(device->domain, device->bus,
2286 	uint32 pba_value = ReadConfig(device->domain, device->bus,
2309 		info->control_value = ReadConfig(device, offset + PCI_ht_command,
2322 			info->address_value = ReadConfig(device, offset
2325 			info->address_value |= ReadConfig(device, offset