Lines Matching refs:fc
266 fwohci_set_bus_manager(struct firewire_comm *fc, u_int node)
268 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
286 device_printf(sc->fc.dev, "%s: %d->%d (loop=%d)\n",
312 device_printf(sc->fc.dev, "%s: failed(1).\n", __func__);
323 device_printf(sc->fc.dev, "%s: failed(2).\n", __func__);
330 device_printf(sc->fc.dev, "%s: 0x%x loop=%d, retry=%d\n",
341 struct fwohci_softc *fc;
350 fc = (struct fwohci_softc *)sc->fc;*/
351 fc = (struct fwohci_softc *)cookie;//our cookie points to sc->fc not sc see fwraw.c
360 OWRITE(fc, reg->addr, reg->data);
361 reg->data = OREAD(fc, reg->addr);
368 reg->data = OREAD(fc, reg->addr);
376 dump_dma(fc, *dmach);
377 dump_db(fc, *dmach);
386 reg->data = fwphy_rddata(fc, reg->addr);
392 reg->data = fwphy_wrdata(fc, reg->addr, reg->data);
421 sc->fc.mode &= ~FWPHYASYST;
422 sc->fc.nport = reg & FW_PHY_NP;
423 sc->fc.speed = reg & FW_PHY_SPD >> 6;
424 if (sc->fc.speed > MAX_SPEED) {
426 sc->fc.speed, MAX_SPEED);
427 sc->fc.speed = MAX_SPEED;
430 linkspeed[sc->fc.speed], sc->fc.nport);
433 sc->fc.mode |= FWPHYASYST;
434 sc->fc.nport = reg & FW_PHY_NP;
435 sc->fc.speed = (reg2 & FW_PHY_ESPD) >> 5;
436 if (sc->fc.speed > MAX_SPEED) {
438 sc->fc.speed, MAX_SPEED);
439 sc->fc.speed = MAX_SPEED;
443 linkspeed[sc->fc.speed], sc->fc.nport);
495 for( i = 0 ; i < sc->fc.nisodma ; i ++ ){
525 sc->fc.maxrec = sc->fc.speed + 8;
526 if ((uint32_t)max_rec != sc->fc.maxrec) {
527 reg2 = (reg2 & 0xffff0fff) | (sc->fc.maxrec << 12);
529 MAXREC(max_rec), MAXREC(sc->fc.maxrec));
536 OWRITE(sc, OHCI_CROMHDR, sc->fc.config_rom[0]);
585 fwohci_set_intr(&sc->fc, 1);
615 sc->fc.nisodma = i;
620 sc->fc.arq = &sc->arrq.xferq;
621 sc->fc.ars = &sc->arrs.xferq;
622 sc->fc.atq = &sc->atrq.xferq;
623 sc->fc.ats = &sc->atrs.xferq;
655 for( i = 0 ; i < sc->fc.nisodma ; i ++ ){
656 sc->fc.it[i] = &sc->it[i].xferq;
657 sc->fc.ir[i] = &sc->ir[i].xferq;
664 sc->fc.tcode = tinfo;
665 // sc->fc.dev = dev;
667 /* sc->fc.config_rom = fwdma_malloc(&sc->fc, CROMSIZE, CROMSIZE,
669 if(sc->fc.config_rom == NULL){
675 bzero(&sc->fc.config_rom[0], CROMSIZE);
676 sc->fc.config_rom[1] = 0x31333934;
677 sc->fc.config_rom[2] = 0xf000a002;
678 sc->fc.config_rom[3] = OREAD(sc, OHCI_EUID_HI);
679 sc->fc.config_rom[4] = OREAD(sc, OHCI_EUID_LO);
680 sc->fc.config_rom[5] = 0;
681 sc->fc.config_rom[0] = (4 << 24) | (5 << 16);
683 sc->fc.config_rom[0] |= fw_crc16(&sc->fc.config_rom[1], 5*4);
689 /*sc->sid_buf = fwdma_malloc(&sc->fc, OHCI_SIDSIZE, OHCI_SIDSIZE,
696 fwdma_malloc(&sc->fc, sizeof(uint32_t), sizeof(uint32_t),
704 sc->fc.crom_sid_Area = alloc_mem(&buf_virt, &buf_phy, CROMSIZE+OHCI_SIDSIZE+sizeof(uint32_t), 0, "fwohci config etc. buf");
705 if (sc->fc.crom_sid_Area < B_OK)
709 sc->fc.config_rom
732 sc->fc.eui.hi = OREAD(sc, FWOHCIGUID_H);
733 sc->fc.eui.lo = OREAD(sc, FWOHCIGUID_L);
735 ui[i] = FW_EUI64_BYTE(&sc->fc.eui,i);
739 sc->fc.ioctl = fwohci_ioctl;
740 sc->fc.cyctimer = fwohci_cyctimer;
741 sc->fc.set_bmr = fwohci_set_bus_manager;
742 sc->fc.ibr = fwohci_ibr;
743 sc->fc.irx_enable = fwohci_irx_enable;
744 sc->fc.irx_disable = fwohci_irx_disable;
746 sc->fc.itx_enable = fwohci_itxbuf_enable;
747 sc->fc.itx_disable = fwohci_itx_disable;
749 sc->fc.irx_post = fwohci_irx_post;
751 sc->fc.irx_post = NULL;
753 sc->fc.itx_post = NULL;
754 sc->fc.timeout = fwohci_timeout;
755 sc->fc.poll = fwohci_poll;
756 sc->fc.set_intr = fwohci_set_intr;
762 sc->fc.taskqueue = taskqueue_create_fast("fw_taskq", M_WAITOK,
763 taskqueue_thread_enqueue, &sc->fc.taskqueue);
764 taskqueue_start_threads(&sc->fc.taskqueue, 1, PI_NET, "fw%d_taskq",
769 gDpc->new_dpc_queue(&sc->fc.taskqueue, "fw_taskq", FW_TASKQ_PRI);
771 fw_init(&sc->fc);
787 fwohci_cyctimer(struct firewire_comm *fc)
789 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
799 fwdma_free(&sc->fc, &sc->sid_dma);
800 if (sc->fc.config_rom != NULL)
801 fwdma_free(&sc->fc, &sc->crom_dma);*/
802 delete_area(sc->fc.crom_sid_Area);
810 for( i = 0 ; i < sc->fc.nisodma ; i ++ ){
816 if (sc->fc.taskqueue != NULL) {
817 /* taskqueue_drain(sc->fc.taskqueue, &sc->fwohci_task_busreset);
818 taskqueue_drain(sc->fc.taskqueue, &sc->fwohci_task_sid);
819 taskqueue_drain(sc->fc.taskqueue, &sc->fwohci_task_dma);
820 taskqueue_drain(sc->fc.taskqueue, &sc->fc.task_timeout);
821 taskqueue_free(sc->fc.taskqueue);*/
822 gDpc->delete_dpc_queue(sc->fc.taskqueue);
824 sc->fc.taskqueue = NULL;
889 FW_GLOCK_ASSERT(&sc->fc);
911 device_printf(sc->fc.dev, "TX queue empty\n");
984 device_printf(sc->fc.dev, "EFBIG.\n");
996 device_printf(sc->fc.dev, "m_getcl failed.\n");
1034 device_printf(sc->fc.dev, "fwohci_start: lack of db_trq\n");
1046 device_printf(sc->fc.dev, "start AT DMA status=%lx\n",
1059 fwohci_start_atq(struct firewire_comm *fc)
1061 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1062 FW_GLOCK(&sc->fc);
1064 FW_GUNLOCK(&sc->fc);
1069 fwohci_start_ats(struct firewire_comm *fc)
1071 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1072 FW_GLOCK(&sc->fc);
1074 FW_GUNLOCK(&sc->fc);
1088 struct firewire_comm *fc = (struct firewire_comm *)sc;
1108 if (fc->status != FWBUSINIT)
1122 device_printf(sc->fc.dev, "force reset AT FIFO\n");
1136 device_printf(sc->fc.dev, "txd err=%2x %s\n", stat, fwohcicode[stat]);
1141 device_printf(sc->fc.dev, "txd err=%2x %s\n", stat, fwohcicode[stat]);
1155 device_printf(sc->fc.dev, "txd err=%2x %s\n",
1193 FW_GLOCK(fc);
1195 FW_GUNLOCK(fc);
1212 FW_GLOCK(fc);
1214 FW_GUNLOCK(fc);
1264 if (bus_dma_tag_create(/*parent*/ sc->fc.dmat,
1275 /*lockarg*/FW_GMTX(&sc->fc),
1336 fwohci_itx_disable(struct firewire_comm *fc, int dmach)
1338 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1353 fwohci_irx_disable(struct firewire_comm *fc, int dmach)
1355 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1370 fwohci_irx_post (struct firewire_comm *fc , uint32_t *qld)
1391 for(dmach = 0 ; dmach < sc->fc.nisodma ; dmach++){
1455 for(dmach = 0 ; dmach < sc->fc.nisodma ; dmach++){
1549 fwohci_next_cycle(struct firewire_comm *fc, int cycle_now)
1580 fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
1582 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1610 FW_GLOCK(fc);
1637 FW_GUNLOCK(fc);
1676 cycle_now = (fc->cyctimer(fc) >> 12) & 0x7fff;
1677 cycle_match = fwohci_next_cycle(fc, cycle_now);
1692 device_printf(sc->fc.dev,
1701 fwohci_irx_enable(struct firewire_comm *fc, int dmach)
1703 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1733 device_printf(fc->dev, "IR DMA no free chunk\n");
1740 FW_GLOCK(fc);
1769 FW_GUNLOCK(fc);
1778 device_printf(sc->fc.dev, "IR DMA overrun (0x%08x)\n", stat);
1804 fwohci_set_intr(&sc->fc, 0);
1812 for( i = 0 ; i < (uint)sc->fc.nisodma ; i ++ ){
1840 device_printf(fc->dev, "INTERRUPT < %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s> 0x%08x, 0x%08x\n",
1869 struct firewire_comm *fc = (struct firewire_comm *)sc;
1872 FW_GLOCK_ASSERT(fc);
1873 if ((stat & OHCI_INT_PHY_BUS_R) && (fc->status != FWBUSRESET)) {
1874 fc->status = FWBUSRESET;
1878 device_printf(fc->dev, "%s: BUS reset\n", __func__);
1888 // taskqueue_enqueue(sc->fc.taskqueue, &sc->fwohci_task_busreset);
1889 gDpc->queue_dpc(sc->fc.taskqueue, fwohci_task_busreset, sc);
1915 fc->nodeid = node_id & 0x3f;
1916 device_printf(fc->dev, "%s: node_id=0x%08x, SelfID Count=%d, ",
1917 __func__, fc->nodeid, (plen >> 16) & 0xff);
1919 device_printf(fc->dev, "%s: Bus reset failure\n",
1937 fc->status = FWBUSINIT;
1940 // taskqueue_enqueue(sc->fc.taskqueue, &sc->fwohci_task_sid);
1941 gDpc->queue_dpc(sc->fc.taskqueue, fwohci_task_sid, sc);
1945 // taskqueue_enqueue(sc->fc.taskqueue, &sc->fwohci_task_dma);
1947 gDpc->queue_dpc(sc->fc.taskqueue, fwohci_task_dma, sc);
1955 struct firewire_comm *fc = (struct firewire_comm *)sc;
1959 for(i = 0; i < (uint)fc->nisodma ; i++){
1965 device_printf(sc->fc.dev,
1975 for(i = 0; i < (uint)fc->nisodma ; i++){
2004 device_printf(sc->fc.dev, "too many cycle lost, "
2015 device_printf(sc->fc.dev, "posted write error\n");
2018 device_printf(sc->fc.dev, "unrecoverable error\n");
2021 device_printf(sc->fc.dev, "phy int\n");
2032 FW_GLOCK(&sc->fc);
2033 fw_busreset(&sc->fc, FWBUSRESET);
2034 OWRITE(sc, OHCI_CROMHDR, ntohl(sc->fc.config_rom[0]));
2035 OWRITE(sc, OHCI_BUS_OPT, ntohl(sc->fc.config_rom[2]));
2036 FW_GUNLOCK(&sc->fc);
2043 struct firewire_comm *fc = &sc->fc;
2054 device_printf(sc->fc.dev, "SID Error\n");
2059 device_printf(sc->fc.dev, "invalid SID len = %d\n", plen);
2065 device_printf(sc->fc.dev, "malloc failed\n");
2076 fw_drain_txq(fc);
2077 fw_sidrcv(fc, buf, plen);
2101 FW_GLOCK_ASSERT(&sc->fc);
2104 device_printf(sc->fc.dev,
2137 //FW_GLOCK(&sc->fc);
2139 //FW_GUNLOCK(&sc->fc);
2144 fwohci_poll(struct firewire_comm *fc, int quick, int count)
2146 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
2148 FW_GLOCK(fc);
2150 FW_GUNLOCK(fc);
2154 fwohci_set_intr(struct firewire_comm *fc, int enable)
2158 sc = (struct fwohci_softc *)fc;
2160 device_printf(sc->fc.dev, "fwohci_set_intr: %d\n", enable);
2173 struct firewire_comm *fc = &sc->fc;
2180 it = fc->it[dmach];
2183 FW_GLOCK(fc);
2201 device_printf(fc->dev, "0x%08x\n", count);
2211 FW_GUNLOCK(fc);
2220 struct firewire_comm *fc = &sc->fc;
2227 ir = fc->ir[dmach];
2235 FW_GLOCK(fc);
2264 device_printf(fc->dev,
2271 FW_GUNLOCK(fc);
2304 device_printf(sc->fc.dev, "ch %1x cntl:0x%08x cmd:0x%08x match:0x%08x\n",
2311 device_printf(sc->fc.dev, "dma %d ch:%s%s%s%s%s%s %s(%x)\n",
2323 device_printf(sc->fc.dev, "dma %d ch: Nostat\n", ch);
2357 device_printf(sc->fc.dev, "No DB is attached ch=%d\n", ch);
2490 fwohci_ibr(struct firewire_comm *fc)
2495 device_printf(fc->dev, "Initiate bus reset\n");
2496 sc = (struct fwohci_softc *)fc;
2498 FW_GLOCK(fc);
2503 OWRITE(sc, OHCI_CROMHDR, ntohl(sc->fc.config_rom[0]));
2504 OWRITE(sc, OHCI_BUS_OPT, ntohl(sc->fc.config_rom[2]));
2519 FW_GUNLOCK(fc);
2533 FW_GLOCK_ASSERT(&sc->fc);
2541 device_printf(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, db_tr->bus_addr, fdb_tr->bus_addr);
2585 device_printf(sc->fc.dev, "DB %08x %3d %08x %08x\n", bulkxfer, bulkxfer->npacket, db_tr->bus_addr, fdb_tr->bus_addr);
2706 device_printf(sc->fc.dev, "Unknown tcode %d\n",
2712 device_printf(sc->fc.dev, "Invalid packet length %d\n", r);
2902 rb.fc = &sc->fc;
2910 if ((sc->fc.status != FWBUSRESET) &&
2911 (sc->fc.status != FWBUSINIT))
2915 device_printf(sc->fc.dev,
2966 device_printf(sc->fc.dev, "AR DMA status=%lx, ",